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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
176 lines
4.9 KiB
Diff
176 lines
4.9 KiB
Diff
From 52e2ade50f3ec212468e284b1236aaa521ba5913 Mon Sep 17 00:00:00 2001
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From: Changhuang Liang <changhuang.liang@starfivetech.com>
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Date: Thu, 18 May 2023 23:02:01 -0700
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Subject: [PATCH 072/122] soc: starfive: Extract JH7110 pmu private operations
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Move JH7110 private operation into private data of compatible. Convenient
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to add AON PMU which would not have interrupts property.
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Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
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Reviewed-by: Walker Chen <walker.chen@starfivetech.com>
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---
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drivers/soc/starfive/jh71xx_pmu.c | 89 +++++++++++++++++++++----------
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1 file changed, 62 insertions(+), 27 deletions(-)
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--- a/drivers/soc/starfive/jh71xx_pmu.c
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+++ b/drivers/soc/starfive/jh71xx_pmu.c
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@@ -51,9 +51,17 @@ struct jh71xx_domain_info {
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u8 bit;
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};
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+struct jh71xx_pmu;
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+struct jh71xx_pmu_dev;
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+
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struct jh71xx_pmu_match_data {
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const struct jh71xx_domain_info *domain_info;
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int num_domains;
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+ unsigned int pmu_status;
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+ int (*pmu_parse_irq)(struct platform_device *pdev,
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+ struct jh71xx_pmu *pmu);
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+ int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd,
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+ u32 mask, bool on);
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};
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struct jh71xx_pmu {
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@@ -79,12 +87,12 @@ static int jh71xx_pmu_get_state(struct j
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if (!mask)
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return -EINVAL;
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- *is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask;
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+ *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask;
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return 0;
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}
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-static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
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+static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
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{
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struct jh71xx_pmu *pmu = pmd->pmu;
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unsigned long flags;
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@@ -92,22 +100,8 @@ static int jh71xx_pmu_set_state(struct j
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u32 mode;
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u32 encourage_lo;
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u32 encourage_hi;
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- bool is_on;
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int ret;
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- ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
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- if (ret) {
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- dev_dbg(pmu->dev, "unable to get current state for %s\n",
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- pmd->genpd.name);
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- return ret;
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- }
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-
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- if (is_on == on) {
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- dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
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- pmd->genpd.name, on ? "en" : "dis");
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- return 0;
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- }
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-
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spin_lock_irqsave(&pmu->lock, flags);
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/*
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@@ -166,6 +160,29 @@ static int jh71xx_pmu_set_state(struct j
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return 0;
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}
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+static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on)
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+{
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+ struct jh71xx_pmu *pmu = pmd->pmu;
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+ const struct jh71xx_pmu_match_data *match_data = pmu->match_data;
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+ bool is_on;
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+ int ret;
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+
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+ ret = jh71xx_pmu_get_state(pmd, mask, &is_on);
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+ if (ret) {
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+ dev_dbg(pmu->dev, "unable to get current state for %s\n",
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+ pmd->genpd.name);
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+ return ret;
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+ }
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+
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+ if (is_on == on) {
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+ dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n",
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+ pmd->genpd.name, on ? "en" : "dis");
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+ return 0;
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+ }
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+
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+ return match_data->pmu_set_state(pmd, mask, on);
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+}
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+
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static int jh71xx_pmu_on(struct generic_pm_domain *genpd)
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{
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struct jh71xx_pmu_dev *pmd = container_of(genpd,
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@@ -226,6 +243,25 @@ static irqreturn_t jh71xx_pmu_interrupt(
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return IRQ_HANDLED;
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}
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+static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu)
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+{
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+ struct device *dev = &pdev->dev;
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+ int ret;
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+
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+ pmu->irq = platform_get_irq(pdev, 0);
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+ if (pmu->irq < 0)
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+ return pmu->irq;
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+
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+ ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
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+ 0, pdev->name, pmu);
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+ if (ret)
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+ dev_err(dev, "failed to request irq\n");
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+
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+ jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
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+
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+ return 0;
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+}
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+
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static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index)
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{
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struct jh71xx_pmu_dev *pmd;
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@@ -275,19 +311,18 @@ static int jh71xx_pmu_probe(struct platf
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if (IS_ERR(pmu->base))
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return PTR_ERR(pmu->base);
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- pmu->irq = platform_get_irq(pdev, 0);
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- if (pmu->irq < 0)
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- return pmu->irq;
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-
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- ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt,
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- 0, pdev->name, pmu);
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- if (ret)
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- dev_err(dev, "failed to request irq\n");
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+ spin_lock_init(&pmu->lock);
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match_data = of_device_get_match_data(dev);
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if (!match_data)
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return -EINVAL;
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+ ret = match_data->pmu_parse_irq(pdev, pmu);
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+ if (ret) {
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+ dev_err(dev, "failed to parse irq\n");
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+ return ret;
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+ }
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+
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pmu->genpd = devm_kcalloc(dev, match_data->num_domains,
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sizeof(struct generic_pm_domain *),
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GFP_KERNEL);
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@@ -307,9 +342,6 @@ static int jh71xx_pmu_probe(struct platf
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}
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}
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- spin_lock_init(&pmu->lock);
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- jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true);
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-
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ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data);
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if (ret) {
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dev_err(dev, "failed to register genpd driver: %d\n", ret);
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@@ -357,6 +389,9 @@ static const struct jh71xx_domain_info j
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static const struct jh71xx_pmu_match_data jh7110_pmu = {
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.num_domains = ARRAY_SIZE(jh7110_power_domains),
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.domain_info = jh7110_power_domains,
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+ .pmu_status = JH71XX_PMU_CURR_POWER_MODE,
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+ .pmu_parse_irq = jh7110_pmu_parse_irq,
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+ .pmu_set_state = jh7110_pmu_set_state,
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};
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static const struct of_device_id jh71xx_pmu_of_match[] = {
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