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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From 2d146c6e550a4fb7f24ca44739cf14594cc2f892 Mon Sep 17 00:00:00 2001
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From: Samin Guo <samin.guo@starfivetech.com>
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Date: Tue, 25 Apr 2023 18:51:15 +0800
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Subject: [PATCH 049/122] dt-bindings: net: motorcomm: Add pad driver strength
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cfg
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The motorcomm phy (YT8531) supports the ability to adjust the drive
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strength of the rx_clk/rx_data, the value range of pad driver
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strength is 0 to 7.
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Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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---
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.../devicetree/bindings/net/motorcomm,yt8xxx.yaml | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml
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+++ b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml
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@@ -18,6 +18,16 @@ properties:
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- ethernet-phy-id4f51.e91a
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- ethernet-phy-id4f51.e91b
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+ rx-clk-driver-strength:
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+ description: drive strength of rx_clk pad.
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+ enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]
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+ default: 3
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+
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+ rx-data-driver-strength:
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+ description: drive strength of rxd/rx_ctl rgmii pad.
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+ enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]
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+ default: 3
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+
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rx-internal-delay-ps:
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description: |
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RGMII RX Clock Delay used only when PHY operates in RGMII mode with
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