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e28492c81a
This is an automatically generated commit. When doing `git bisect`, consider `git bisect --skip`. Signed-off-by: Robert Marko <robimarko@gmail.com>
58 lines
2.1 KiB
Diff
58 lines
2.1 KiB
Diff
From 3dcf7b59393812a5fbd83f8cd8d34b94afb4c4d1 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Sat, 21 Oct 2023 13:55:18 +0200
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Subject: [PATCH] clk: qcom: gcc-ipq6018: add QUP6 I2C clock
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QUP6 I2C clock is listed in the dt bindings but it was never included in
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the GCC driver.
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So lets add support for it, it is marked as criticial as it is used by RPM
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to communicate to the external PMIC over I2C so this clock must not be
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disabled.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Reviewed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Link: https://lore.kernel.org/r/20231021115545.229060-1-robimarko@gmail.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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drivers/clk/qcom/gcc-ipq6018.c | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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--- a/drivers/clk/qcom/gcc-ipq6018.c
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+++ b/drivers/clk/qcom/gcc-ipq6018.c
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@@ -2120,6 +2120,26 @@ static struct clk_branch gcc_blsp1_qup5_
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},
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};
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+static struct clk_branch gcc_blsp1_qup6_i2c_apps_clk = {
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+ .halt_reg = 0x07010,
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+ .clkr = {
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+ .enable_reg = 0x07010,
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+ .enable_mask = BIT(0),
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+ .hw.init = &(struct clk_init_data){
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+ .name = "gcc_blsp1_qup6_i2c_apps_clk",
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+ .parent_hws = (const struct clk_hw *[]){
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+ &blsp1_qup6_i2c_apps_clk_src.clkr.hw },
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+ .num_parents = 1,
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+ /*
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+ * RPM uses QUP6 I2C to communicate with the external
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+ * PMIC so it must not be disabled.
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+ */
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+ .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
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+ .ops = &clk_branch2_ops,
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+ },
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+ },
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+};
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+
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static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = {
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.halt_reg = 0x0700c,
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.clkr = {
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@@ -4276,6 +4296,7 @@ static struct clk_regmap *gcc_ipq6018_cl
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[GCC_BLSP1_QUP4_SPI_APPS_CLK] = &gcc_blsp1_qup4_spi_apps_clk.clkr,
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[GCC_BLSP1_QUP5_I2C_APPS_CLK] = &gcc_blsp1_qup5_i2c_apps_clk.clkr,
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[GCC_BLSP1_QUP5_SPI_APPS_CLK] = &gcc_blsp1_qup5_spi_apps_clk.clkr,
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+ [GCC_BLSP1_QUP6_I2C_APPS_CLK] = &gcc_blsp1_qup6_i2c_apps_clk.clkr,
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[GCC_BLSP1_QUP6_SPI_APPS_CLK] = &gcc_blsp1_qup6_spi_apps_clk.clkr,
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[GCC_BLSP1_UART1_APPS_CLK] = &gcc_blsp1_uart1_apps_clk.clkr,
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[GCC_BLSP1_UART2_APPS_CLK] = &gcc_blsp1_uart2_apps_clk.clkr,
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