mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 15:56:49 +00:00
8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
104 lines
3.9 KiB
Diff
104 lines
3.9 KiB
Diff
From 15153c7b169cbd1779ffa5a5bd3ae3dc0ff2d4eb Mon Sep 17 00:00:00 2001
|
|
From: Maxime Ripard <maxime@cerno.tech>
|
|
Date: Fri, 24 Mar 2023 09:56:31 +0100
|
|
Subject: [PATCH 0593/1085] drm/vc4: plane: Change ptr0_offset to an array
|
|
|
|
The BCM2712 will have a fairly different dlist, that will feature one
|
|
Pointer 0 word for each plane.
|
|
|
|
Let's prepare by changing the ptr0_offset variable that holds the offset
|
|
in a dlist of the pointer 0 word to an array.
|
|
|
|
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_drv.h | 3 ++-
|
|
drivers/gpu/drm/vc4/vc4_plane.c | 18 +++++++++---------
|
|
2 files changed, 11 insertions(+), 10 deletions(-)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_drv.h
|
|
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
|
|
@@ -14,6 +14,7 @@
|
|
#include <drm/drm_debugfs.h>
|
|
#include <drm/drm_device.h>
|
|
#include <drm/drm_encoder.h>
|
|
+#include <drm/drm_fourcc.h>
|
|
#include <drm/drm_gem_dma_helper.h>
|
|
#include <drm/drm_managed.h>
|
|
#include <drm/drm_mm.h>
|
|
@@ -410,7 +411,7 @@ struct vc4_plane_state {
|
|
*/
|
|
u32 pos0_offset;
|
|
u32 pos2_offset;
|
|
- u32 ptr0_offset;
|
|
+ u32 ptr0_offset[DRM_FORMAT_MAX_PLANES];
|
|
u32 lbm_offset;
|
|
|
|
/* Offset where the plane's dlist was last stored in the
|
|
--- a/drivers/gpu/drm/vc4/vc4_plane.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
|
|
@@ -1242,7 +1242,7 @@ static int vc4_plane_mode_set(struct drm
|
|
*
|
|
* The pointers may be any byte address.
|
|
*/
|
|
- vc4_state->ptr0_offset = vc4_state->dlist_count;
|
|
+ vc4_state->ptr0_offset[0] = vc4_state->dlist_count;
|
|
for (i = 0; i < num_planes; i++)
|
|
vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
|
|
|
|
@@ -1446,13 +1446,13 @@ void vc4_plane_async_set_fb(struct drm_p
|
|
* scanout will start from this address as soon as the FIFO
|
|
* needs to refill with pixels.
|
|
*/
|
|
- writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
|
|
+ writel(addr, &vc4_state->hw_dlist[vc4_state->ptr0_offset[0]]);
|
|
|
|
/* Also update the CPU-side dlist copy, so that any later
|
|
* atomic updates that don't do a new modeset on our plane
|
|
* also use our updated address.
|
|
*/
|
|
- vc4_state->dlist[vc4_state->ptr0_offset] = addr;
|
|
+ vc4_state->dlist[vc4_state->ptr0_offset[0]] = addr;
|
|
|
|
drm_dev_exit(idx);
|
|
}
|
|
@@ -1516,8 +1516,8 @@ static void vc4_plane_atomic_async_updat
|
|
new_vc4_state->dlist[vc4_state->pos0_offset];
|
|
vc4_state->dlist[vc4_state->pos2_offset] =
|
|
new_vc4_state->dlist[vc4_state->pos2_offset];
|
|
- vc4_state->dlist[vc4_state->ptr0_offset] =
|
|
- new_vc4_state->dlist[vc4_state->ptr0_offset];
|
|
+ vc4_state->dlist[vc4_state->ptr0_offset[0]] =
|
|
+ new_vc4_state->dlist[vc4_state->ptr0_offset[0]];
|
|
|
|
/* Note that we can't just call vc4_plane_write_dlist()
|
|
* because that would smash the context data that the HVS is
|
|
@@ -1527,8 +1527,8 @@ static void vc4_plane_atomic_async_updat
|
|
&vc4_state->hw_dlist[vc4_state->pos0_offset]);
|
|
writel(vc4_state->dlist[vc4_state->pos2_offset],
|
|
&vc4_state->hw_dlist[vc4_state->pos2_offset]);
|
|
- writel(vc4_state->dlist[vc4_state->ptr0_offset],
|
|
- &vc4_state->hw_dlist[vc4_state->ptr0_offset]);
|
|
+ writel(vc4_state->dlist[vc4_state->ptr0_offset[0]],
|
|
+ &vc4_state->hw_dlist[vc4_state->ptr0_offset[0]]);
|
|
|
|
drm_dev_exit(idx);
|
|
}
|
|
@@ -1555,7 +1555,7 @@ static int vc4_plane_atomic_async_check(
|
|
if (old_vc4_state->dlist_count != new_vc4_state->dlist_count ||
|
|
old_vc4_state->pos0_offset != new_vc4_state->pos0_offset ||
|
|
old_vc4_state->pos2_offset != new_vc4_state->pos2_offset ||
|
|
- old_vc4_state->ptr0_offset != new_vc4_state->ptr0_offset ||
|
|
+ old_vc4_state->ptr0_offset[0] != new_vc4_state->ptr0_offset[0] ||
|
|
vc4_lbm_size(plane->state) != vc4_lbm_size(new_plane_state))
|
|
return -EINVAL;
|
|
|
|
@@ -1565,7 +1565,7 @@ static int vc4_plane_atomic_async_check(
|
|
for (i = 0; i < new_vc4_state->dlist_count; i++) {
|
|
if (i == new_vc4_state->pos0_offset ||
|
|
i == new_vc4_state->pos2_offset ||
|
|
- i == new_vc4_state->ptr0_offset ||
|
|
+ i == new_vc4_state->ptr0_offset[0] ||
|
|
(new_vc4_state->lbm_offset &&
|
|
i == new_vc4_state->lbm_offset))
|
|
continue;
|