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9100566267
Manually rebased patches: ath79/patches-5.4/910-unaligned_access_hacks.patch bcm27xx/patches-5.4/950-0135-spi-spi-bcm2835-Disable-forced-software-CS.patch bcm27xx/patches-5.4/950-0414-SQUASH-Fix-spi-driver-compiler-warnings.patch ipq806x/patches-5.4/093-4-v5.8-ipq806x-PCI-qcom-Use-bulk-clk-api-and-assert-on-error.patch Removed since could be reverse-applied by quilt and found to be included upstream: ipq806x/patches-5.4/096-PCI-qcom-Make-sure-PCIe-is-reset-before-init-for-rev.patch All modifications made by update_kernel.sh Build system: x86_64 Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711 Run-tested: ipq806x/R7800 No dmesg regressions, everything functional Signed-off-by: John Audia <graysky@archlinux.us> [refresh altered targets after rebase] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
217 lines
6.2 KiB
Diff
217 lines
6.2 KiB
Diff
From caaa71fac36ec8c19145dbf8262a9b77ab09f1a1 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Wed, 4 Mar 2020 22:38:32 +0100
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Subject: net: mdio: add ipq8064 mdio driver
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Currently ipq806x soc use generic bitbang driver to
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comunicate with the gmac ethernet interface.
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Add a dedicated driver created by chunkeey to fix this.
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Co-developed-by: Christian Lamparter <chunkeey@gmail.com>
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Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/Kconfig | 8 ++
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drivers/net/phy/Makefile | 1 +
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drivers/net/phy/mdio-ipq8064.c | 166 +++++++++++++++++++++++++++++++++++++++++
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3 files changed, 175 insertions(+)
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create mode 100644 drivers/net/phy/mdio-ipq8064.c
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--- a/drivers/net/phy/Kconfig
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+++ b/drivers/net/phy/Kconfig
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@@ -156,6 +156,14 @@ config MDIO_I2C
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This is library mode.
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+config MDIO_IPQ8064
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+ tristate "Qualcomm IPQ8064 MDIO interface support"
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+ depends on HAS_IOMEM && OF_MDIO
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+ depends on MFD_SYSCON
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+ help
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+ This driver supports the MDIO interface found in the network
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+ interface units of the IPQ8064 SoC
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+
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config MDIO_MOXART
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tristate "MOXA ART MDIO interface support"
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depends on ARCH_MOXART || COMPILE_TEST
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--- a/drivers/net/phy/Makefile
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+++ b/drivers/net/phy/Makefile
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@@ -50,6 +50,7 @@ obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium
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obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
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obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
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obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
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+obj-$(CONFIG_MDIO_IPQ8064) += mdio-ipq8064.o
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obj-$(CONFIG_MDIO_MOXART) += mdio-moxart.o
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obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
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obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o
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--- /dev/null
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+++ b/drivers/net/phy/mdio-ipq8064.c
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@@ -0,0 +1,166 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/* Qualcomm IPQ8064 MDIO interface driver
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+ *
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+ * Copyright (C) 2019 Christian Lamparter <chunkeey@gmail.com>
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+ * Copyright (C) 2020 Ansuel Smith <ansuelsmth@gmail.com>
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+ */
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+
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+#include <linux/delay.h>
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/regmap.h>
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+#include <linux/of_mdio.h>
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+#include <linux/phy.h>
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+#include <linux/platform_device.h>
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+#include <linux/mfd/syscon.h>
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+
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+/* MII address register definitions */
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+#define MII_ADDR_REG_ADDR 0x10
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+#define MII_BUSY BIT(0)
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+#define MII_WRITE BIT(1)
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+#define MII_CLKRANGE_60_100M (0 << 2)
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+#define MII_CLKRANGE_100_150M (1 << 2)
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+#define MII_CLKRANGE_20_35M (2 << 2)
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+#define MII_CLKRANGE_35_60M (3 << 2)
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+#define MII_CLKRANGE_150_250M (4 << 2)
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+#define MII_CLKRANGE_250_300M (5 << 2)
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+#define MII_CLKRANGE_MASK GENMASK(4, 2)
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+#define MII_REG_SHIFT 6
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+#define MII_REG_MASK GENMASK(10, 6)
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+#define MII_ADDR_SHIFT 11
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+#define MII_ADDR_MASK GENMASK(15, 11)
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+
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+#define MII_DATA_REG_ADDR 0x14
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+
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+#define MII_MDIO_DELAY_USEC (1000)
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+#define MII_MDIO_RETRY_MSEC (10)
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+
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+struct ipq8064_mdio {
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+ struct regmap *base; /* NSS_GMAC0_BASE */
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+};
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+
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+static int
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+ipq8064_mdio_wait_busy(struct ipq8064_mdio *priv)
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+{
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+ u32 busy;
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+
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+ return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,
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+ !(busy & MII_BUSY), MII_MDIO_DELAY_USEC,
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+ MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);
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+}
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+
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+static int
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+ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
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+{
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+ u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
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+ struct ipq8064_mdio *priv = bus->priv;
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+ u32 ret_val;
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+ int err;
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+
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+ /* Reject clause 45 */
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+ if (reg_offset & MII_ADDR_C45)
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+ return -EOPNOTSUPP;
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+
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+ miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
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+ ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
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+
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+ regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
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+ usleep_range(8, 10);
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+
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+ err = ipq8064_mdio_wait_busy(priv);
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+ if (err)
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+ return err;
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+
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+ regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
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+ return (int)ret_val;
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+}
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+
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+static int
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+ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
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+{
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+ u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
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+ struct ipq8064_mdio *priv = bus->priv;
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+
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+ /* Reject clause 45 */
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+ if (reg_offset & MII_ADDR_C45)
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+ return -EOPNOTSUPP;
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+
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+ regmap_write(priv->base, MII_DATA_REG_ADDR, data);
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+
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+ miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
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+ ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
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+
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+ regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
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+ usleep_range(8, 10);
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+
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+ return ipq8064_mdio_wait_busy(priv);
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+}
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+
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+static int
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+ipq8064_mdio_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np = pdev->dev.of_node;
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+ struct ipq8064_mdio *priv;
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+ struct mii_bus *bus;
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+ int ret;
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+
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+ bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
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+ if (!bus)
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+ return -ENOMEM;
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+
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+ bus->name = "ipq8064_mdio_bus";
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+ bus->read = ipq8064_mdio_read;
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+ bus->write = ipq8064_mdio_write;
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+ snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
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+ bus->parent = &pdev->dev;
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+
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+ priv = bus->priv;
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+ priv->base = device_node_to_regmap(np);
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+ if (IS_ERR(priv->base)) {
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+ if (priv->base == ERR_PTR(-EPROBE_DEFER))
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+ return -EPROBE_DEFER;
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+
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+ dev_err(&pdev->dev, "error getting device regmap, error=%pe\n",
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+ priv->base);
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+ return PTR_ERR(priv->base);
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+ }
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+
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+ ret = of_mdiobus_register(bus, np);
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+ if (ret)
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+ return ret;
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+
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+ platform_set_drvdata(pdev, bus);
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+ return 0;
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+}
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+
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+static int
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+ipq8064_mdio_remove(struct platform_device *pdev)
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+{
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+ struct mii_bus *bus = platform_get_drvdata(pdev);
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+
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+ mdiobus_unregister(bus);
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+
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+ return 0;
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+}
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+
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+static const struct of_device_id ipq8064_mdio_dt_ids[] = {
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+ { .compatible = "qcom,ipq8064-mdio" },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids);
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+
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+static struct platform_driver ipq8064_mdio_driver = {
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+ .probe = ipq8064_mdio_probe,
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+ .remove = ipq8064_mdio_remove,
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+ .driver = {
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+ .name = "ipq8064-mdio",
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+ .of_match_table = ipq8064_mdio_dt_ids,
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+ },
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+};
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+
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+module_platform_driver(ipq8064_mdio_driver);
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+
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+MODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver");
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+MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
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+MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
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+MODULE_LICENSE("GPL");
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