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7612ecb201
It's reported that current memory detection code occasionally detects larger memory under some bootloaders. Current memory detection code tests whether address space wraps around on KSEG0, which is unreliable because it's cached. Rewrite memory size detection to perform the same test on KSEG1 instead. While at it, this patch also does the following two things: 1. use a fixed pattern instead of a random function pointer as the magic value. 2. add an additional memory write and a second comparison as part of the test to prevent possible smaller memory detection result due to leftover values in memory. Fixes:6d91ddf517("ramips: mt7621: add support for memory detection") Reported-by: Rui Salvaterra <rsalvaterra@gmail.com> Tested-by: Rui Salvaterra <rsalvaterra@gmail.com> Signed-off-by: Chuanhong Guo <gch981213@gmail.com> (cherry picked from commit2f024b7933) [backport for OpenWrt 21.02 as it was reproducible with Kernel 5.4, see [1]] [1]: https://forum.openwrt.org/t/113081 Tested-by: Dimitri Souza <dimitri.souza@gmail.com> [mt7621/archer-c6-v3] Signed-off-by: Szabolcs Hubai <szab.hu@gmail.com>
63 lines
2.0 KiB
Diff
63 lines
2.0 KiB
Diff
--- a/arch/mips/ralink/mt7621.c
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+++ b/arch/mips/ralink/mt7621.c
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@@ -58,7 +58,9 @@
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#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
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#define MT7621_GPIO_MODE_SDHCI_GPIO 1
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-static void *detect_magic __initdata = detect_memory_region;
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+#define MT7621_MEM_TEST_PATTERN 0xaa5555aa
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+
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+static u32 detect_magic __initdata;
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static struct rt2880_pmx_func uart1_grp[] = { FUNC("uart1", 0, 1, 2) };
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static struct rt2880_pmx_func i2c_grp[] = { FUNC("i2c", 0, 3, 2) };
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@@ -144,26 +146,34 @@ static struct clk *__init mt7621_add_sys
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return clk;
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}
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+static bool __init mt7621_addr_wraparound_test(phys_addr_t size)
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+{
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+ void *dm = (void *)KSEG1ADDR(&detect_magic);
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+ if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE)
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+ return true;
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+ __raw_writel(MT7621_MEM_TEST_PATTERN, dm);
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+ if (__raw_readl(dm) != __raw_readl(dm + size))
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+ return false;
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+ __raw_writel(!MT7621_MEM_TEST_PATTERN, dm);
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+ return __raw_readl(dm) == __raw_readl(dm + size);
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+}
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+
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void __init mt7621_memory_detect(void)
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{
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- void *dm = &detect_magic;
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phys_addr_t size;
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- for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) {
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- if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic)))
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- break;
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+ for (size = 32 * SZ_1M; size <= 256 * SZ_1M; size <<= 1) {
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+ if (mt7621_addr_wraparound_test(size)) {
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+ add_memory_region(MT7621_LOWMEM_BASE, size, BOOT_MEM_RAM);
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+ return;
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+ }
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}
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- if ((size == 256 * SZ_1M) &&
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- (CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) &&
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- __builtin_memcmp(dm, dm + size, sizeof(detect_magic))) {
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- add_memory_region(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE,
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- BOOT_MEM_RAM);
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- add_memory_region(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE,
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- BOOT_MEM_RAM);
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- } else {
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- add_memory_region(MT7621_LOWMEM_BASE, size, BOOT_MEM_RAM);
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- }
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+ /* addr doesn't wrap around at dm + 256M, assume 512M memory. */
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+ add_memory_region(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE,
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+ BOOT_MEM_RAM);
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+ add_memory_region(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE,
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+ BOOT_MEM_RAM);
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}
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void __init ralink_clk_init(void)
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