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6bf179b270
Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi accordingly. The Lantiq IRQ SMP support added upstream required changes to the SoC dtsi as well. Following changes are made to the Lantiq kernel patches: 0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch 0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch applied upstream 0008-MIPS-lantiq-backport-old-timer-code.patch access_ok API update because it lost it's type (which was the first) parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument from access_ok() function") 0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch 0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch revert upstream changes required for upstream xrx200 ethernet and xrx200 (DSA) switch driver but breaking our driver 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch required for our driver but dropped upstream, add former upstream version 0028-NET-lantiq-various-etop-fixes.patch now has to use the phy_set_max_speed API instead of modifying phydev->supported. Also call ltq_dma_enable_irq() in ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS: lantiq: Do not enable IRQs in dma open") Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
219 lines
6.3 KiB
Diff
219 lines
6.3 KiB
Diff
From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Wed, 10 Sep 2014 22:42:14 +0200
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Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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.../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +
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arch/mips/lantiq/xway/Makefile | 3 +
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arch/mips/lantiq/xway/ath5k_eep.c | 136 +++++++++++++++++++++
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arch/mips/lantiq/xway/eth_mac.c | 25 ++++
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drivers/net/ethernet/lantiq_etop.c | 6 +-
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5 files changed, 172 insertions(+), 1 deletion(-)
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create mode 100644 arch/mips/lantiq/xway/ath5k_eep.c
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create mode 100644 arch/mips/lantiq/xway/eth_mac.c
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
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@@ -102,5 +102,8 @@ int xrx200_gphy_boot(struct device *dev,
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extern void ltq_pmu_enable(unsigned int module);
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extern void ltq_pmu_disable(unsigned int module);
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+/* allow the ethernet driver to load a flash mapped mac addr */
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+const u8* ltq_get_eth_mac(void);
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+
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#endif /* CONFIG_SOC_TYPE_XWAY */
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#endif /* _LTQ_XWAY_H__ */
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--- a/arch/mips/lantiq/xway/Makefile
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+++ b/arch/mips/lantiq/xway/Makefile
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@@ -8,3 +8,6 @@ obj-y += timer.o
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endif
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obj-y += vmmc.o
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+
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+obj-y += eth_mac.o
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+obj-$(CONFIG_PCI) += ath5k_eep.o
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/ath5k_eep.c
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@@ -0,0 +1,136 @@
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+/*
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+ * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
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+ * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
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+ * Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
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+ * Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
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+ * Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
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+ * Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/etherdevice.h>
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+#include <linux/ath5k_platform.h>
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+#include <linux/pci.h>
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+#include <linux/err.h>
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+#include <linux/mtd/mtd.h>
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+#include <lantiq_soc.h>
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+
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+extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
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+struct ath5k_platform_data ath5k_pdata;
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+static u8 athxk_eeprom_mac[6];
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+
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+static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ dev->dev.platform_data = &ath5k_pdata;
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+ return 0;
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+}
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+
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+static int ath5k_eep_load;
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+int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
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+{
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+ struct device_node *np = pdev->dev.of_node, *mtd_np = NULL;
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+ int mac_offset;
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+ u32 mac_inc = 0;
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+ int i;
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+ struct mtd_info *the_mtd;
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+ size_t flash_readlen;
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+ const __be32 *list;
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+ const char *part;
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+ phandle phandle;
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+
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+ list = of_get_property(np, "ath,eep-flash", &i);
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+ if (!list || (i != (2 * sizeof(*list))))
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+ return -ENODEV;
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+
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+ phandle = be32_to_cpup(list++);
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+ if (phandle)
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+ mtd_np = of_find_node_by_phandle(phandle);
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+
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+ if (!mtd_np)
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+ return -ENODEV;
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+
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+ part = of_get_property(mtd_np, "label", NULL);
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+ if (!part)
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+ part = mtd_np->name;
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+
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+ the_mtd = get_mtd_device_nm(part);
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+ if (IS_ERR(the_mtd))
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+ return -ENODEV;
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+
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+ ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1, GFP_KERNEL);
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+
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+ i = mtd_read(the_mtd, be32_to_cpup(list), ATH5K_PLAT_EEP_MAX_WORDS << 1,
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+ &flash_readlen, (void *) ath5k_pdata.eeprom_data);
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+
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+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
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+ size_t mac_readlen;
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+ mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
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+ (void *) athxk_eeprom_mac);
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+ }
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+ put_mtd_device(the_mtd);
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+
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+ if (((ATH5K_PLAT_EEP_MAX_WORDS<<1) != flash_readlen) || i) {
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+ dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
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+ return -ENODEV;
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+ }
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+
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+ if (of_find_property(np, "ath,eep-swap", NULL))
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+ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
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+ ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
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+
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+ if (!is_valid_ether_addr(athxk_eeprom_mac) && ltq_get_eth_mac())
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+ ether_addr_copy(athxk_eeprom_mac, ltq_get_eth_mac());
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+
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+ if (!is_valid_ether_addr(athxk_eeprom_mac)) {
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+ dev_warn(&pdev->dev, "using random mac\n");
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+ random_ether_addr(athxk_eeprom_mac);
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+ }
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+
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+ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
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+ athxk_eeprom_mac[5] += mac_inc;
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+
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+ ath5k_pdata.macaddr = athxk_eeprom_mac;
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+ ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
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+
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+ dev_info(&pdev->dev, "loaded ath5k eeprom\n");
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+
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+ return 0;
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+}
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+
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+static struct of_device_id ath5k_eeprom_ids[] = {
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+ { .compatible = "ath5k,eeprom" },
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+ { }
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+};
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+
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+static struct platform_driver ath5k_eeprom_driver = {
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+ .driver = {
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+ .name = "ath5k,eeprom",
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+ .owner = THIS_MODULE,
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+ .of_match_table = of_match_ptr(ath5k_eeprom_ids),
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+ },
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+};
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+
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+static int __init of_ath5k_eeprom_init(void)
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+{
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+ int ret = platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
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+
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+ if (ret)
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+ ath5k_eep_load = 1;
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+
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+ return ret;
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+}
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+
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+static int __init of_ath5k_eeprom_init_late(void)
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+{
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+ if (!ath5k_eep_load)
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+ return 0;
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+
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+ return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
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+}
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+late_initcall(of_ath5k_eeprom_init_late);
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+subsys_initcall(of_ath5k_eeprom_init);
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/eth_mac.c
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@@ -0,0 +1,25 @@
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+/*
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+ * Copyright (C) 2012 John Crispin <blogic@openwrt.org>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include <linux/init.h>
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+#include <linux/if_ether.h>
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+
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+static u8 eth_mac[6];
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+static int eth_mac_set;
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+
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+const u8* ltq_get_eth_mac(void)
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+{
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+ return eth_mac;
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+}
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+
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+static int __init setup_ethaddr(char *str)
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+{
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+ eth_mac_set = mac_pton(str, eth_mac);
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+ return !eth_mac_set;
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+}
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+early_param("ethaddr", setup_ethaddr);
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--- a/drivers/net/ethernet/lantiq_etop.c
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+++ b/drivers/net/ethernet/lantiq_etop.c
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@@ -764,7 +764,11 @@ ltq_etop_init(struct net_device *dev)
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if (err)
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goto err_hw;
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- memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
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+ memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
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+
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+ if (priv->mac && !is_valid_ether_addr(mac.sa_data))
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+ memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
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+
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if (!is_valid_ether_addr(mac.sa_data)) {
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pr_warn("etop: invalid MAC, using random\n");
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eth_random_addr(mac.sa_data);
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