openwrt/target/linux/realtek/dts/rtl8380_zyxel_gs1900.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later

#include "rtl838x.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

/ {
	aliases {
		led-boot = &led_sys;
		led-failsafe = &led_sys;
		led-running = &led_sys;
		led-upgrade = &led_sys;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x8000000>;
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		pinctrl-names = "default";
		pinctrl-0 = <&pinmux_disable_sys_led>;
		compatible = "gpio-leds";

		led_sys: sys {
			label = "green:sys";
			gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio1: rtl8231-gpio {
		compatible = "realtek,rtl8231-gpio";
		#gpio-cells = <2>;
		gpio-controller;
		indirect-access-bus-id = <0>;

		poe_enable {
			gpio-hog;
			gpios = <13 GPIO_ACTIVE_HIGH>;
			output-high;
		};
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x40000>;
				read-only;
			};
			partition@40000 {
				label = "u-boot-env";
				reg = <0x40000 0x10000>;
				read-only;
			};
			partition@50000 {
				label = "u-boot-env2";
				reg = <0x50000 0x10000>;
			};
			partition@60000 {
				label = "jffs";
				reg = <0x60000 0x100000>;
			};
			partition@160000 {
				label = "jffs2";
				reg = <0x160000 0x100000>;
			};
			partition@b260000 {
				label = "firmware";
				reg = <0x260000 0x6d0000>;
				compatible = "openwrt,uimage", "denx,uimage";
				openwrt,ih-magic = <0x83800000>;
			};
			partition@930000 {
				label = "runtime2";
				reg = <0x930000 0x6d0000>;
			};
		};
	};
};

&ethernet0 {
	mdio: mdio-bus {
		compatible = "realtek,rtl838x-mdio";
		regmap = <&ethernet0>;
		#address-cells = <1>;
		#size-cells = <0>;

		INTERNAL_PHY(8)
		INTERNAL_PHY(9)
		INTERNAL_PHY(10)
		INTERNAL_PHY(11)
		INTERNAL_PHY(12)
		INTERNAL_PHY(13)
		INTERNAL_PHY(14)
		INTERNAL_PHY(15)
	};
};

&switch0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		SWITCH_PORT(8, 1, internal)
		SWITCH_PORT(9, 2, internal)
		SWITCH_PORT(10, 3, internal)
		SWITCH_PORT(11, 4, internal)
		SWITCH_PORT(12, 5, internal)
		SWITCH_PORT(13, 6, internal)
		SWITCH_PORT(14, 7, internal)
		SWITCH_PORT(15, 8, internal)

		port@28 {
			ethernet = <&ethernet0>;
			reg = <28>;
			phy-mode = "internal";

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};
	};
};