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Daniel Golle: 190-arm64-dts-mediatek-mt7622-fix-GICv2-range.patch Rui Salvaterra: 191-arm64-dts-mt7622-specify-the-L2-cache-topology.patch 192-arm64-dts-mt7622-specify-the-number-of-DMA-requests.patch Signed-off-by: Daniel Golle <daniel@makrotopia.org>
107 lines
4.9 KiB
Diff
107 lines
4.9 KiB
Diff
From patchwork Tue Apr 26 19:51:36 2022
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id 1njRDu-0006aF-4F; Tue, 26 Apr 2022 21:51:46 +0200
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Date: Tue, 26 Apr 2022 20:51:36 +0100
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From: Daniel Golle <daniel@makrotopia.org>
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To: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
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linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
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Cc: Rob Herring <robh+dt@kernel.org>,
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Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
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Matthias Brugger <matthias.bgg@gmail.com>
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Subject: [PATCH] arm64: dts: mediatek: mt7622: fix GICv2 range
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With the current range specified for the CPU interface there is an
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error message at boot:
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GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
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Setting irqchip.gicv2_force_probe=1 in bootargs results in:
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GIC: Aliased GICv2 at 0x0000000010320000, trying to find the canonical range over 128kB
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GIC: Adjusting CPU interface base to 0x000000001032f000
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GIC: Using split EOI/Deactivate mode
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Using the adjusted CPU interface base and 8K size results in only the
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final line remaining and fully working system as well as /proc/interrupts
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showing additional IPI3,4,5,6:
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IPI3: 0 0 CPU stop (for crash dump) interrupts
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IPI4: 0 0 Timer broadcast interrupts
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IPI5: 0 0 IRQ work interrupts
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IPI6: 0 0 CPU wake-up interrupts
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
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@@ -339,7 +339,7 @@
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0 0x10310000 0 0x1000>,
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- <0 0x10320000 0 0x1000>,
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+ <0 0x1032f000 0 0x2000>,
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<0 0x10340000 0 0x2000>,
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<0 0x10360000 0 0x2000>;
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};
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