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290a6527be
Each individual device DTS now enables either pcie0 or pcie1. Signed-off-by: Michael Pratt <mcpratt@pm.me>
127 lines
2.0 KiB
Plaintext
127 lines
2.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "qca955x_senao_loader.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "engenius,enstationac-v1", "qca,qca9557";
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model = "EnGenius EnStationAC v1";
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aliases {
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label-mac-device = ð0;
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "amber:power";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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default-state = "on";
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};
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wlan {
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label = "green:wlan";
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gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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rssilow {
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label = "red:rssilow";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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};
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rssimedium {
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label = "amber:rssimedium";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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};
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rssihigh {
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label = "green:rssihigh";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&partitions {
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art: partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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&mdio0 {
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <1>;
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eee-broken-100tx;
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eee-broken-1000t;
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};
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phy2: ethernet-phy@2 {
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reg = <2>;
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eee-broken-100tx;
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eee-broken-1000t;
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at803x-override-sgmii-link-check;
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};
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};
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ð0 {
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status = "okay";
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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phy-handle = <&phy1>;
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phy-mode = "rgmii-id";
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pll-data = <0x82000000 0x80000101 0x80001313>;
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};
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ð1 {
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status = "okay";
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nvmem-cells = <&macaddr_art_0>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <1>;
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phy-handle = <&phy2>;
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pll-data = <0x03000000 0x00000101 0x00001313>;
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qca955x-sgmii-fixup;
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};
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&pcie0 {
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status = "okay";
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};
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&art {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_art_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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};
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