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949e8ba521
This adds support for the Netgear PGZNG1, also known as the ADT Pulse
Gateway.
Hardware:
CPU: Atheros AR9344
Memory: 256MB
Storage: 256MB NAND Hynix H27U2G8F2CTR-BC
USB: 1x USB 2.0
Ethernet: 2x 100Mb/s
WiFi: Atheros AR9340 2.4GHz 2T2R
Leds: 8 LEDs
Button: 1x Reset Button
UART:
Header marked JPE1. Pinout is VCC, TX, RX, GND. The marked pin, closest
to the JPE1 marking, is VCC. Note VCC isn't required to be connected
for UART to work.
Enable Stock Firmware Shell Access:
1. Interrupt u-boot and run the following commands
setenv console_mode 1
saveenv
reset
This will enable a UART shell in the firmware. You can then login using
the root password of `icontrol`. If that doesn't work, the device is
running a firmware based on OpenWRT where you can drop into failsafe to
mount the FS and then modify /etc/passwd.
Installation Instructions:
1. Interupt u-boot and run the following commands
setenv active_image 0
setenv stock_bootcmd nboot 0x81000000 0 \${kernel_offset}
setenv openwrt_bootcmd nboot 0x82000000 0 \${kernel_offset}
setenv bootcmd run openwrt_bootcmd
saveenv
2. boot initramfs image via TFTP u-boot
tftpboot 0x82000000 openwrt-ath79-nand-netgear_pgzng1-initramfs-kernel.bin; bootm 0x82000000
3. Once booted, use LuCI sysupgrade to
flash openwrt-ath79-nand-netgear_pgzng1-squashfs-sysupgrade.bin
MAC Table:
WAN (eth0): xx:xa - caldata 0x0
LAN (eth1): xx:xb - caldata 0x6
WLAN (phy0): xx:xc - burned into ath9k caldata
Not Working:
Z-Wave
RS422
Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
(added more hw-info, fixed file permissions)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
334 lines
5.7 KiB
Plaintext
334 lines
5.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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#include "ar9344.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/leds/leds-pca955x.h>
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/ {
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model = "Netgear PGZNG1";
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compatible = "netgear,pgzng1", "qca,ar9344";
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_power_green;
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label-mac-device = ð0;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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i2c {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio 13 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
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#address-cells = <1>;
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#size-cells = <0>;
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expander0: pca9551@60 {
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compatible = "nxp,pca9551";
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reg = <0x60>;
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#address-cells = <1>;
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#size-cells = <0>;
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led_power_green: led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_BOOT;
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type = <PCA955X_TYPE_LED>;
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chan-name = "green:boot";
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};
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led_power_red: led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_BOOT;
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type = <PCA955X_TYPE_LED>;
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chan-name = "red:boot";
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};
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led@2 {
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reg = <2>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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function-enumerator = <1>;
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type = <PCA955X_TYPE_LED>;
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};
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led@3 {
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reg = <3>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_WAN;
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type = <PCA955X_TYPE_LED>;
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};
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led@4 {
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reg = <4>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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type = <PCA955X_TYPE_LED>;
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};
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led@5 {
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reg = <5>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_WLAN;
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type = <PCA955X_TYPE_LED>;
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};
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led@6 {
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reg = <6>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_INDICATOR;
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type = <PCA955X_TYPE_LED>;
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};
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led@7 {
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reg = <7>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_INDICATOR;
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type = <PCA955X_TYPE_LED>;
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};
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};
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expander1: pca9551@61 {
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compatible = "nxp,pca9551";
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reg = <0x61>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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/* zwave_rst - Resets ZWave */
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gpio@4 {
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reg = <4>;
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type = <PCA955X_TYPE_GPIO>;
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};
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/* em_rst - Unknown */
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gpio@5 {
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reg = <5>;
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type = <PCA955X_TYPE_GPIO>;
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};
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/* tp34 - Test point on PCB? */
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gpio@6 {
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reg = <6>;
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type = <PCA955X_TYPE_GPIO>;
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};
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/* sw_rst - resets SoC */
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gpio@7 {
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reg = <7>;
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type = <PCA955X_TYPE_GPIO>;
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};
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};
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rtc@6f {
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compatible = "isil,isl1208";
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reg = <0x6f>;
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};
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};
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leds {
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compatible = "gpio-leds";
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eth1_link {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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};
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eth1_act {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_LAN;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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eth0_link {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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function-enumerator = <0>;
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gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
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};
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eth0_act {
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color = <LED_COLOR_ID_AMBER>;
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function = LED_FUNCTION_WAN;
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gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð0 {
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status = "okay";
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phy-handle = <&swphy0>;
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nvmem-cells = <&macaddr_caldata_6>;
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nvmem-cell-names = "mac-address";
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};
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ð1 {
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status = "okay";
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phy-handle = <&swphy4>;
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nvmem-cells = <&macaddr_caldata_0>;
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nvmem-cell-names = "mac-address";
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gmac-config {
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device = <&gmac>;
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switch-phy-swap = <1>;
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switch-only-mode = <1>;
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};
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};
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&gpio {
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gpio_ext_lna0 {
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gpio-hog;
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line-name = "ext:lna0";
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gpios = <18 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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gpio_ext_lna1 {
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gpio-hog;
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line-name = "ext:lna1";
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gpios = <19 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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gpio_enable_rs422 {
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gpio-hog;
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line-name = "power:rs422";
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gpios = <20 GPIO_ACTIVE_HIGH>;
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output-high;
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};
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x40000 0x40000>;
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read-only;
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};
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/* factory kernel used to be reg = <0x80000 0x200000> */
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partition@80000 {
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label = "kernel";
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reg = <0x80000 0x500000>;
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};
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/* factory rootfs used to be reg = <0x280000 0x5000000> */
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4d00000>;
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};
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partition@5280000 {
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label = "uImage2";
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reg = <0x5280000 0x200000>;
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read-only;
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};
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partition@5480000 {
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label = "rootfs_bak";
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reg = <0x5480000 0x5000000>;
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read-only;
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};
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partition@a480000 {
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label = "config";
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reg = <0xa480000 0x1400000>;
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read-only;
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};
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partition@b880000 {
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label = "storage";
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reg = <0xb880000 0x4700000>;
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read-only;
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};
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partition@ff80000 {
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label = "dummy";
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reg = <0xff80000 0x60000>;
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read-only;
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};
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caldata: partition@ffe0000 {
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label = "caldata";
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reg = <0xffe0000 0x20000>;
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read-only;
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_caldata_0: macaddr@0 {
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reg = <0x0 0x6>;
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};
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macaddr_caldata_6: macaddr@6 {
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reg = <0x6 0x6>;
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};
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cal_caldata_1000: cal@1000 {
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reg = <0x1000 0x440>;
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};
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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/* zWave is wired up via SPI and UART1 (no idea on pins sadly) */
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&spi {
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status = "okay";
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};
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&wmac {
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status = "okay";
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nvmem-cells = <&cal_caldata_1000>;
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nvmem-cell-names = "calibration";
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};
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&usb {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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