mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 22:47:56 +00:00
02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
66 lines
2.1 KiB
Diff
66 lines
2.1 KiB
Diff
From 236d07c7bb0c758ea40ea0110d37306d2e7d9a4b Mon Sep 17 00:00:00 2001
|
|
From: Rohit Vaswani <rvaswani@codeaurora.org>
|
|
Date: Thu, 31 Oct 2013 17:26:33 -0700
|
|
Subject: [PATCH 010/182] devicetree: bindings: Document Krait/Scorpion cpus
|
|
and enable-method
|
|
|
|
Scorpion and Krait don't use the spin-table enable-method.
|
|
Instead they rely on mmio register accesses to enable power and
|
|
clocks to bring CPUs out of reset. Document their enable-methods.
|
|
|
|
Cc: <devicetree@vger.kernel.org>
|
|
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
|
|
[sboyd: Split off into separate patch, renamed methods to
|
|
match compatible nodes]
|
|
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
|
Signed-off-by: Kumar Gala <galak@codeaurora.org>
|
|
---
|
|
Documentation/devicetree/bindings/arm/cpus.txt | 25 +++++++++++++++++++++++-
|
|
1 file changed, 24 insertions(+), 1 deletion(-)
|
|
|
|
--- a/Documentation/devicetree/bindings/arm/cpus.txt
|
|
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
|
|
@@ -180,7 +180,11 @@ nodes to be present and contain the prop
|
|
be one of:
|
|
"spin-table"
|
|
"psci"
|
|
- # On ARM 32-bit systems this property is optional.
|
|
+ # On ARM 32-bit systems this property is optional and
|
|
+ can be one of:
|
|
+ "qcom,gcc-msm8660"
|
|
+ "qcom,kpss-acc-v1"
|
|
+ "qcom,kpss-acc-v2"
|
|
|
|
- cpu-release-addr
|
|
Usage: required for systems that have an "enable-method"
|
|
@@ -191,6 +195,21 @@ nodes to be present and contain the prop
|
|
property identifying a 64-bit zero-initialised
|
|
memory location.
|
|
|
|
+ - qcom,saw
|
|
+ Usage: required for systems that have an "enable-method"
|
|
+ property value of "qcom,kpss-acc-v1" or
|
|
+ "qcom,kpss-acc-v2"
|
|
+ Value type: <phandle>
|
|
+ Definition: Specifies the SAW[1] node associated with this CPU.
|
|
+
|
|
+ - qcom,acc
|
|
+ Usage: required for systems that have an "enable-method"
|
|
+ property value of "qcom,kpss-acc-v1" or
|
|
+ "qcom,kpss-acc-v2"
|
|
+ Value type: <phandle>
|
|
+ Definition: Specifies the ACC[2] node associated with this CPU.
|
|
+
|
|
+
|
|
Example 1 (dual-cluster big.LITTLE system 32-bit):
|
|
|
|
cpus {
|
|
@@ -382,3 +401,7 @@ cpus {
|
|
cpu-release-addr = <0 0x20000000>;
|
|
};
|
|
};
|
|
+
|
|
+--
|
|
+[1] arm/msm/qcom,saw2.txt
|
|
+[2] arm/msm/qcom,kpss-acc.txt
|