openwrt/target
Shiji Yang de0c143742
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ramips: mt762{0,8}: reduce default MMC clock to 24 MHz
The upstream mtk-sd driver did not perform specific timing
optimization for MT762x series SoC, hence the SDHC peripheral
of some boards cannot run at too high frequency. Reduce the
maximum clock frequency to fix the mmc read/write error.

Closes: https://github.com/openwrt/openwrt/issues/17364
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/17375
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-12-26 15:23:49 +01:00
..
imagebuilder imagebuilder: fix OPKG package_whatdepends support 2024-11-20 09:49:21 +01:00
linux ramips: mt762{0,8}: reduce default MMC clock to 24 MHz 2024-12-26 15:23:49 +01:00
llvm-bpf build: use zstd for IB, toolchain, SDK and LLVM compression 2024-04-13 08:05:04 +02:00
sdk sdk: bundle libraries for llvm toolchain 2024-10-19 20:43:54 +02:00
toolchain build: use zstd for IB, toolchain, SDK and LLVM compression 2024-04-13 08:05:04 +02:00
Config.in loongarch64: new target 2024-05-04 14:14:16 +08:00
Makefile build: add $(STAGING_DIR) and $(BIN_DIR) preparation to target and package subdir compile dependencies 2024-03-03 23:13:59 +01:00