mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 06:08:08 +00:00
56 lines
1.8 KiB
Diff
56 lines
1.8 KiB
Diff
From: Stas Sergeev <stsp@list.ru>
|
|
Date: Wed, 2 Dec 2015 20:33:56 +0300
|
|
Subject: [PATCH] mvneta: consolidate autoneg enabling
|
|
|
|
This moves autoneg-related bit manipulations to the single place.
|
|
|
|
CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
CC: netdev@vger.kernel.org
|
|
CC: linux-kernel@vger.kernel.org
|
|
|
|
Signed-off-by: Stas Sergeev <stsp@users.sourceforge.net>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
|
|
--- a/drivers/net/ethernet/marvell/mvneta.c
|
|
+++ b/drivers/net/ethernet/marvell/mvneta.c
|
|
@@ -1067,15 +1067,28 @@ static void mvneta_defaults_set(struct m
|
|
MVNETA_GMAC_AN_SPEED_EN |
|
|
MVNETA_GMAC_AN_DUPLEX_EN;
|
|
mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
|
|
+
|
|
val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
|
|
val |= MVNETA_GMAC_1MS_CLOCK_ENABLE;
|
|
mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
|
|
+
|
|
+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
|
|
+ val |= MVNETA_GMAC2_INBAND_AN_ENABLE;
|
|
+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
|
|
} else {
|
|
val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG);
|
|
val &= ~(MVNETA_GMAC_INBAND_AN_ENABLE |
|
|
MVNETA_GMAC_AN_SPEED_EN |
|
|
MVNETA_GMAC_AN_DUPLEX_EN);
|
|
mvreg_write(pp, MVNETA_GMAC_AUTONEG_CONFIG, val);
|
|
+
|
|
+ val = mvreg_read(pp, MVNETA_GMAC_CLOCK_DIVIDER);
|
|
+ val &= ~MVNETA_GMAC_1MS_CLOCK_ENABLE;
|
|
+ mvreg_write(pp, MVNETA_GMAC_CLOCK_DIVIDER, val);
|
|
+
|
|
+ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2);
|
|
+ val &= ~MVNETA_GMAC2_INBAND_AN_ENABLE;
|
|
+ mvreg_write(pp, MVNETA_GMAC_CTRL_2, val);
|
|
}
|
|
|
|
mvneta_set_ucast_table(pp, -1);
|
|
@@ -3230,9 +3243,6 @@ static int mvneta_port_power_up(struct m
|
|
return -EINVAL;
|
|
}
|
|
|
|
- if (pp->use_inband_status)
|
|
- ctrl |= MVNETA_GMAC2_INBAND_AN_ENABLE;
|
|
-
|
|
/* Cancel Port Reset */
|
|
ctrl &= ~MVNETA_GMAC2_PORT_RESET;
|
|
mvreg_write(pp, MVNETA_GMAC_CTRL_2, ctrl);
|