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eb13076e77
The upstream solution to define the MDIO bus in DT is a bit more strict than our previous downstream solution doing the same thing and now requires switch PHYs to be referenced in DT as well. Arınç Ünal told us in #15141: "With [the now upstream patch written by him which we backported], the switch MDIO bus won't be assigned to ds->user_mii_bus when the switch MDIO bus is defined on the device tree anymore. This was not the case with the downstream patch. When ds->user_mii_bus is populated, DSA will 1:1 map the port with PHY. Meaning port with address 1 will be mapped to PHY with address 1. Because that ds->user_mii_bus is not populated when the switch MDIO bus is defined on the device tree, on every port node, the PHY address must be supplied by the phy-handle property." Add those phy-handles to affected devices' DT. Fixes:4354b34f6f
("generic: 6.6: sync mt7530 DSA driver with upstream") Fixes:401a6ccfaf
("generic: 6.1: sync mt7530 DSA driver with upstream") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
508 lines
9.6 KiB
Plaintext
508 lines
9.6 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7986a.dtsi"
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/ {
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model = "Acer Predator W6";
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compatible = "acer,predator-w6", "mediatek,mt7986a";
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aliases {
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serial0 = &uart0;
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "dm-mod.create=\"dm-verity,,,ro,0 31544 verity 1 PARTLABEL=rootfs PARTLABEL=rootfs 4096 4096 3943 3944 sha256 2f969fa9e9e4e20b37746f22633e85b178f5db7c143e11f92733a704299cc933 2dd56e34b15c6c84573cf26c4392028421061d2c808975217b45e9a5b49d2087\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
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};
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memory {
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reg = <0 0x40000000 0 0x20000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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factory {
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label = "factory";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status: led@0 {
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label = "ant0:red";
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gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@1 {
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label = "ant0:green";
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gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@2 {
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label = "ant0:blue";
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gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@3 {
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label = "ant1:red";
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gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@4 {
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label = "ant1:green";
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gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@5 {
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label = "ant1:blue";
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gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@6 {
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label = "ant2:red";
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gpios = <&pio 38 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@7 {
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label = "ant2:green";
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gpios = <&pio 37 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@8 {
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label = "ant2:blue";
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gpios = <&pio 26 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@9 {
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label = "ant3:red";
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gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@10 {
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label = "ant3:green";
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gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@11 {
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label = "ant3:blue";
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gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@12 {
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label = "ant4:red";
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gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@13 {
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label = "ant4:green";
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gpios = <&pio 27 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@14 {
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label = "ant4:blue";
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gpios = <&pio 32 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@15 {
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label = "ant5:red";
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gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@16 {
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label = "ant5:green";
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gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led@17 {
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label = "ant5:blue";
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gpios = <&pio 43 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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/* LAN */
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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/* WAN */
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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phy-handle = <&phy6>;
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&mdio {
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phy6: phy@6 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <6>;
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reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
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/* LED0: nc ; LED1: nc ; LED2: Amber ; LED3: Green */
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mxl,led-config = <0x0 0x0 0x370 0x80>;
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};
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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reset-assert-us = <10000>;
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reset-deassert-us = <10000>;
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};
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};
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&pio {
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mmc0_pins_default: mmc0-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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pcie_pins: pcie-pins {
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mux {
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function = "pcie";
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groups = "pcie_pereset";
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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wf_dbdc_pins: wf-dbdc-pins {
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mux {
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function = "wifi";
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groups = "wf_dbdc";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "game";
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phy-handle = <&swphy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&swphy1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&swphy2>;
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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phy-handle = <&swphy3>;
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};
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port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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swphy0: phy@0 {
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reg = <0>;
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mediatek,led-config = <
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0x21 0x8009 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0000 /* LED0_BLINK_CTRL */
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0x26 0xc007 /* LED1_ON_CTRL */
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0x27 0x003f /* LED1_BLINK_CTRL */
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>;
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};
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swphy1: phy@1 {
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reg = <1>;
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mediatek,led-config = <
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0x21 0x8009 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0000 /* LED0_BLINK_CTRL */
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0x26 0xc007 /* LED1_ON_CTRL */
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0x27 0x003f /* LED1_BLINK_CTRL */
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>;
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};
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swphy2: phy@2 {
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reg = <2>;
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mediatek,led-config = <
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0x21 0x8009 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0000 /* LED0_BLINK_CTRL */
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0x26 0xc007 /* LED1_ON_CTRL */
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0x27 0x003f /* LED1_BLINK_CTRL */
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>;
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};
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swphy3: phy@3 {
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reg = <3>;
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mediatek,led-config = <
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0x21 0x8009 /* BASIC_CTRL */
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0x22 0x0c00 /* ON_DURATION */
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0x23 0x1400 /* BLINK_DURATION */
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0x24 0xc001 /* LED0_ON_CTRL */
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0x25 0x0000 /* LED0_BLINK_CTRL */
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0x26 0xc007 /* LED1_ON_CTRL */
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0x27 0x003f /* LED1_BLINK_CTRL */
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>;
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};
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};
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};
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&wifi {
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status = "okay";
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pinctrl-names = "default", "dbdc";
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pinctrl-0 = <&wf_2g_5g_pins>;
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pinctrl-1 = <&wf_dbdc_pins>;
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};
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&trng {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&crypto {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&ssusb {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&mmc0 {
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status = "okay";
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <0x08>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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hs400-ds-delay = <0x14014>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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no-sd;
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no-sdio;
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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