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Manually rebased: bcm27xx/patches-5.15/950-0421-Support-RPi-DPI-interface-in-mode6-for-18-bit-color.patch bcm27xx/patches-5.15/950-0706-media-i2c-imx219-Scale-the-pixel-clock-rate-for-the-.patch ramips/patches-5.15/810-uvc-add-iPassion-iP2970-support.patch Removed upstreamed: bcm27xx/patches-5.15/950-0707-drm-vc4-For-DPI-MEDIA_BUS_FMT_RGB565_1X16-is-mode-1-.patch[1] bcm27xx/patches-5.15/950-0596-drm-vc4-dpi-Add-option-for-inverting-pixel-clock-and.patch[2] ipq807x/0006-v5.16-arm64-dts-qcom-Fix-IPQ8074-PCIe-PHY-nodes.patch [3] ipq807x/0034-v6.1-arm64-dts-qcom-ipq8074-fix-PCIe-PHY-serdes-size.patch [4] ipq807x/0103-arm64-dts-qcom-ipq8074-fix-Gen2-PCIe-QMP-PHY.patch [5] ipq807x/0104-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-QMP-PHY.patch [6] ipq807x/0105-arm64-dts-qcom-ipq8074-correct-Gen2-PCIe-ranges.patch [7] ipq807x/0108-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-node.patch [8] ipq807x/0109-arm64-dts-qcom-ipq8074-correct-PCIe-QMP-PHY-output-c.patch [9] ipq807x/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch [10] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.99&id=d2991e6b30020e286f2dd9d3b4f43548c547caa6 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/gpu/drm/vc4/vc4_dpi.c?h=v5.15.100&id=8e04aaffb6de5f1ae61de7b671c1531172ccf429 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=a55a645aa303a3f7ec37db69822d5420657626da 4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=d9df682bcea57fa25f37bbf17eae56fa05662635 5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=7e6eeb5fb3aa9e5feffdb6e137dcc06f5f6410e1 6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=e88204931d9a60634cd50bbc679f045439c4b91d 7. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=1563af0f28afd3b6d64ac79a2aecced3969c90bf 8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=feb8c71f015d416f1afe90e1f62cf51e47376c67 9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=69c7a270357a7d50ffd3471b14c60250041200e3 10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=dd3d021ae5471d98adf81f1e897431c8657d0a18 Build system: x86_64 Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me> Tested-by: Robert Marko <robimarko@gmail.com> #ipq807x/Dynalink WRX36 Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> #ipq807x/ax3600, x86_64/FW-7543B, ath79/tl-wdr3600, ipq806x/g10, ipq806x/nbg6817
146 lines
4.8 KiB
Diff
146 lines
4.8 KiB
Diff
From 0e096c4f431ccd7f73e9baa930821dd3bbe93e35 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Tue, 25 Jan 2022 17:28:18 +0000
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Subject: [PATCH] drm/vc4: Support zpos on all planes
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Adds the zpos property to all planes, and creates the dlist
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by placing the fragments in the correct order based on zpos.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_hvs.c | 43 +++++++++++++++++++++------------
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drivers/gpu/drm/vc4/vc4_kms.c | 3 +--
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drivers/gpu/drm/vc4/vc4_plane.c | 22 ++++++++++++++---
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3 files changed, 48 insertions(+), 20 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -854,6 +854,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
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bool debug_dump_regs = false;
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bool enable_bg_fill = false;
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u32 __iomem *dlist_start, *dlist_next;
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+ unsigned int zpos = 0;
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+ bool found = false;
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if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED)
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return;
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@@ -867,23 +869,34 @@ void vc4_hvs_atomic_flush(struct drm_crt
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dlist_next = dlist_start;
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/* Copy all the active planes' dlist contents to the hardware dlist. */
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- drm_atomic_crtc_for_each_plane(plane, crtc) {
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- /* Is this the first active plane? */
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- if (dlist_next == dlist_start) {
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- /* We need to enable background fill when a plane
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- * could be alpha blending from the background, i.e.
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- * where no other plane is underneath. It suffices to
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- * consider the first active plane here since we set
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- * needs_bg_fill such that either the first plane
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- * already needs it or all planes on top blend from
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- * the first or a lower plane.
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- */
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- vc4_plane_state = to_vc4_plane_state(plane->state);
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- enable_bg_fill = vc4_plane_state->needs_bg_fill;
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+ do {
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+ found = false;
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+
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+ drm_atomic_crtc_for_each_plane(plane, crtc) {
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+ if (plane->state->normalized_zpos != zpos)
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+ continue;
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+
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+ /* Is this the first active plane? */
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+ if (dlist_next == dlist_start) {
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+ /* We need to enable background fill when a plane
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+ * could be alpha blending from the background, i.e.
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+ * where no other plane is underneath. It suffices to
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+ * consider the first active plane here since we set
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+ * needs_bg_fill such that either the first plane
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+ * already needs it or all planes on top blend from
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+ * the first or a lower plane.
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+ */
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+ vc4_plane_state = to_vc4_plane_state(plane->state);
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+ enable_bg_fill = vc4_plane_state->needs_bg_fill;
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+ }
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+
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+ dlist_next += vc4_plane_write_dlist(plane, dlist_next);
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+
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+ found = true;
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}
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- dlist_next += vc4_plane_write_dlist(plane, dlist_next);
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- }
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+ zpos++;
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+ } while (found);
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writel(SCALER_CTL0_END, dlist_next);
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dlist_next++;
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--- a/drivers/gpu/drm/vc4/vc4_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_kms.c
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@@ -1042,8 +1042,7 @@ int vc4_kms_load(struct drm_device *dev)
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dev->mode_config.helper_private = &vc4_mode_config_helpers;
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dev->mode_config.preferred_depth = 24;
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dev->mode_config.async_page_flip = true;
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- if (vc4->firmware_kms)
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- dev->mode_config.normalize_zpos = true;
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+ dev->mode_config.normalize_zpos = true;
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ret = vc4_ctm_obj_init(vc4);
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if (ret)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -1575,9 +1575,14 @@ struct drm_plane *vc4_plane_init(struct
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DRM_COLOR_YCBCR_BT709,
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DRM_COLOR_YCBCR_LIMITED_RANGE);
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+ if (type == DRM_PLANE_TYPE_PRIMARY)
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+ drm_plane_create_zpos_immutable_property(plane, 0);
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+
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return plane;
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}
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+#define VC4_NUM_OVERLAY_PLANES 16
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+
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int vc4_plane_create_additional_planes(struct drm_device *drm)
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{
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struct drm_plane *cursor_plane;
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@@ -1593,7 +1598,7 @@ int vc4_plane_create_additional_planes(s
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* modest number of planes to expose, that should hopefully
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* still cover any sane usecase.
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*/
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- for (i = 0; i < 16; i++) {
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+ for (i = 0; i < VC4_NUM_OVERLAY_PLANES; i++) {
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struct drm_plane *plane =
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vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
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@@ -1602,17 +1607,28 @@ int vc4_plane_create_additional_planes(s
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plane->possible_crtcs =
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GENMASK(drm->mode_config.num_crtc - 1, 0);
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+
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+ /* Create zpos property. Max of all the overlays + 1 primary +
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+ * 1 cursor plane on a crtc.
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+ */
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+ drm_plane_create_zpos_property(plane, i + 1, 1,
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+ VC4_NUM_OVERLAY_PLANES + 1);
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}
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drm_for_each_crtc(crtc, drm) {
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/* Set up the legacy cursor after overlay initialization,
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- * since we overlay planes on the CRTC in the order they were
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- * initialized.
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+ * since the zpos fallback is that planes are rendered by plane
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+ * ID order, and that then puts the cursor on top.
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*/
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cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
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if (!IS_ERR(cursor_plane)) {
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cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
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crtc->cursor = cursor_plane;
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+
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+ drm_plane_create_zpos_property(cursor_plane,
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+ VC4_NUM_OVERLAY_PLANES + 1,
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+ 1,
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+ VC4_NUM_OVERLAY_PLANES + 1);
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}
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}
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