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78fb818f7c
SVN-Revision: 31130
69 lines
2.5 KiB
Diff
69 lines
2.5 KiB
Diff
From 04456614952a9a848192253439b4e361f0321cb5 Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <florian@openwrt.org>
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Date: Wed, 25 Jan 2012 17:39:51 +0100
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Subject: [PATCH 05/63] MIPS: BCM63XX: add IRQ_SPI and CPU specific SPI IRQ values
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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---
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 7 +++++++
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1 files changed, 7 insertions(+), 0 deletions(-)
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
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@@ -478,6 +478,7 @@ static inline unsigned long bcm63xx_regs
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*/
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enum bcm63xx_irq {
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IRQ_TIMER = 0,
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+ IRQ_SPI,
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IRQ_UART0,
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IRQ_UART1,
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IRQ_DSL,
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@@ -509,6 +510,7 @@ enum bcm63xx_irq {
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* 6338 irqs
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*/
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#define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
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+#define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
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#define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
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#define BCM_6338_UART1_IRQ 0
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#define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5)
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@@ -539,6 +541,7 @@ enum bcm63xx_irq {
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* 6345 irqs
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*/
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#define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
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+#define BCM_6345_SPI_IRQ 0
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#define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
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#define BCM_6345_UART1_IRQ 0
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#define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
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@@ -569,6 +572,7 @@ enum bcm63xx_irq {
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* 6348 irqs
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*/
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#define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
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+#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
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#define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
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#define BCM_6348_UART1_IRQ 0
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#define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
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@@ -599,6 +603,7 @@ enum bcm63xx_irq {
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* 6358 irqs
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*/
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#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
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+#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
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#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
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#define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
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#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
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@@ -638,6 +643,7 @@ enum bcm63xx_irq {
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#define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
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#define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
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+#define BCM_6368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
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#define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
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#define BCM_6368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
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#define BCM_6368_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
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@@ -677,6 +683,7 @@ extern const int *bcm63xx_irqs;
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#define __GEN_CPU_IRQ_TABLE(__cpu) \
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[IRQ_TIMER] = BCM_## __cpu ##_TIMER_IRQ, \
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+ [IRQ_SPI] = BCM_## __cpu ##_SPI_IRQ, \
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[IRQ_UART0] = BCM_## __cpu ##_UART0_IRQ, \
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[IRQ_UART1] = BCM_## __cpu ##_UART1_IRQ, \
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[IRQ_DSL] = BCM_## __cpu ##_DSL_IRQ, \
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