mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 15:56:49 +00:00
05ed7dc50d
Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
43 lines
1.3 KiB
Diff
43 lines
1.3 KiB
Diff
From b2349278894bb381fa26a8717d3093d53f08fd36 Mon Sep 17 00:00:00 2001
|
|
From: Eugen Hristev <eugen.hristev@microchip.com>
|
|
Date: Thu, 19 Nov 2020 17:43:10 +0200
|
|
Subject: [PATCH 104/247] clk: at91: clk-master: add 5th divisor for mck master
|
|
|
|
clk-master can have 5 divisors with a field width of 3 bits
|
|
on some products.
|
|
|
|
Change the mask and number of divisors accordingly.
|
|
|
|
Reported-by: Mihai Sain <mihai.sain@microchip.com>
|
|
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
|
|
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
|
|
Link: https://lore.kernel.org/r/1605800597-16720-5-git-send-email-claudiu.beznea@microchip.com
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
---
|
|
drivers/clk/at91/clk-master.c | 2 +-
|
|
drivers/clk/at91/pmc.h | 2 +-
|
|
2 files changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/clk/at91/clk-master.c
|
|
+++ b/drivers/clk/at91/clk-master.c
|
|
@@ -15,7 +15,7 @@
|
|
#define MASTER_PRES_MASK 0x7
|
|
#define MASTER_PRES_MAX MASTER_PRES_MASK
|
|
#define MASTER_DIV_SHIFT 8
|
|
-#define MASTER_DIV_MASK 0x3
|
|
+#define MASTER_DIV_MASK 0x7
|
|
|
|
#define PMC_MCR 0x30
|
|
#define PMC_MCR_ID_MSK GENMASK(3, 0)
|
|
--- a/drivers/clk/at91/pmc.h
|
|
+++ b/drivers/clk/at91/pmc.h
|
|
@@ -48,7 +48,7 @@ extern const struct clk_master_layout at
|
|
|
|
struct clk_master_characteristics {
|
|
struct clk_range output;
|
|
- u32 divisors[4];
|
|
+ u32 divisors[5];
|
|
u8 have_div3_pres;
|
|
};
|
|
|