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190 lines
5.0 KiB
Diff
190 lines
5.0 KiB
Diff
From d8d7a5805579db687fdfdfda4125b43d6a50e616 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime.ripard@free-electrons.com>
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Date: Tue, 24 Sep 2013 11:07:43 +0300
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Subject: [PATCH] reset: Add Allwinner A31 Reset Controller Driver
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The Allwinner A31 has an IP maintaining a few other IPs in the SoC in
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reset by default. Among these IPs are the High Speed Timers, hence why
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we can't use the regular driver construct, and need to call the
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registering function directly during machine initialisation.
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Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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---
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drivers/reset/Makefile | 1 +
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drivers/reset/reset-sunxi.c | 156 ++++++++++++++++++++++++++++++++++++++++++++
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2 files changed, 157 insertions(+)
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create mode 100644 drivers/reset/reset-sunxi.c
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diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
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index 1e2d83f..f216b74 100644
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--- a/drivers/reset/Makefile
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+++ b/drivers/reset/Makefile
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@@ -1 +1,2 @@
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obj-$(CONFIG_RESET_CONTROLLER) += core.o
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+obj-$(CONFIG_ARCH_SUNXI) += reset-sun6i.o
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diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c
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new file mode 100644
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index 0000000..5bbd59a
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--- /dev/null
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+++ b/drivers/reset/reset-sunxi.c
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@@ -0,0 +1,156 @@
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+/*
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+ * Allwinner SoCs Reset Controller driver
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+ *
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+ * Copyright 2013 Maxime Ripard
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+ *
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+ * Maxime Ripard <maxime.ripard@free-electrons.com>
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License as published by
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+ * the Free Software Foundation; either version 2 of the License, or
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+ * (at your option) any later version.
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+ */
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+
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+#include <linux/err.h>
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+#include <linux/io.h>
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+#include <linux/module.h>
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+#include <linux/of.h>
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+#include <linux/of_address.h>
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+#include <linux/platform_device.h>
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+#include <linux/reset-controller.h>
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+#include <linux/slab.h>
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+#include <linux/types.h>
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+
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+struct sunxi_reset_data {
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+ void __iomem *membase;
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+ struct reset_controller_dev rcdev;
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+};
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+
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+static int sunxi_reset_assert(struct reset_controller_dev *rcdev,
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+ unsigned long id)
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+{
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+ struct sunxi_reset_data *data = container_of(rcdev,
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+ struct sunxi_reset_data,
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+ rcdev);
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+ int bank = id / BITS_PER_LONG;
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+ int offset = id % BITS_PER_LONG;
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+ u32 reg = readl(data->membase + (bank * 4));
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+
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+ writel(reg & ~BIT(offset), data->membase + (bank * 4));
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+
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+ return 0;
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+}
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+
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+static int sunxi_reset_deassert(struct reset_controller_dev *rcdev,
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+ unsigned long id)
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+{
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+ struct sunxi_reset_data *data = container_of(rcdev,
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+ struct sunxi_reset_data,
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+ rcdev);
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+ int bank = id / BITS_PER_LONG;
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+ int offset = id % BITS_PER_LONG;
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+ u32 reg = readl(data->membase + (bank * 4));
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+
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+ writel(reg | BIT(offset), data->membase + (bank * 4));
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+
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+ return 0;
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+}
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+
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+static struct reset_control_ops sunxi_reset_ops = {
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+ .assert = sunxi_reset_assert,
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+ .deassert = sunxi_reset_deassert,
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+};
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+
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+static int sunxi_reset_init(struct device_node *np)
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+{
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+ struct sunxi_reset_data *data;
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+ struct resource res;
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+ resource_size_t size;
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+ int ret;
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+
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+ data = kzalloc(sizeof(*data), GFP_KERNEL);
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+ if (!data)
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+ return -ENOMEM;
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+
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+ ret = of_address_to_resource(np, 0, &res);
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+ if (ret)
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+ goto err_alloc;
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+
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+ size = resource_size(&res);
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+ data->membase = ioremap(res.start, size);
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+ if (!data->membase) {
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+ ret = -ENOMEM;
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+ goto err_alloc;
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+ }
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+
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+ data->rcdev.owner = THIS_MODULE;
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+ data->rcdev.nr_resets = size * 32;
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+ data->rcdev.ops = &sunxi_reset_ops;
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+ data->rcdev.of_node = np;
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+ reset_controller_register(&data->rcdev);
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+
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+ return 0;
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+
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+err_alloc:
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+ kfree(data);
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+ return ret;
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+};
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+
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+/*
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+ * These are the reset controller we need to initialize early on in
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+ * our system, before we can even think of using a regular device
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+ * driver for it.
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+ */
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+static const struct of_device_id sunxi_early_reset_dt_ids[] __initdata = {
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+ { .compatible = "allwinner,sun6i-a31-ahb1-reset", },
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+ { /* sentinel */ },
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+};
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+
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+void __init sun6i_reset_init(void)
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+{
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+ struct device_node *np;
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+
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+ for_each_matching_node(np, sunxi_early_reset_dt_ids)
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+ sunxi_reset_init(np);
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+}
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+
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+/*
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+ * And these are the controllers we can register through the regular
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+ * device model.
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+ */
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+static const struct of_device_id sunxi_reset_dt_ids[] = {
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+ { .compatible = "allwinner,sun4i-clock-reset", },
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+ { /* sentinel */ },
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+};
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+MODULE_DEVICE_TABLE(of, sunxi_reset_dt_ids);
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+
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+static int sunxi_reset_probe(struct platform_device *pdev)
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+{
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+ return sunxi_reset_init(pdev->dev.of_node);
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+}
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+
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+static int sunxi_reset_remove(struct platform_device *pdev)
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+{
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+ struct sunxi_reset_data *data = platform_get_drvdata(pdev);
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+
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+ reset_controller_unregister(&data->rcdev);
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+ iounmap(data->membase);
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+ kfree(data);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver sunxi_reset_driver = {
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+ .probe = sunxi_reset_probe,
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+ .remove = sunxi_reset_remove,
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+ .driver = {
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+ .name = "sunxi-reset",
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+ .owner = THIS_MODULE,
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+ .of_match_table = sunxi_reset_dt_ids,
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+ },
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+};
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+module_platform_driver(sunxi_reset_driver);
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+
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+MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com");
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+MODULE_DESCRIPTION("Allwinner SoCs Reset Controller Driver");
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+MODULE_LICENSE("GPL");
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--
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1.8.4
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