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d41d9befb9
Add u-boot bootloader based on 2023.01 to support D1-based boards, currently: - Dongshan Nezha STU - LicheePi RV Dock - MangoPi MQ-Pro - Nezha D1 Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
204 lines
6.1 KiB
Diff
204 lines
6.1 KiB
Diff
From 61b63cbb3526e19a0e299f95a3435a237c7c4b4b Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 15 May 2022 21:54:25 -0500
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Subject: [PATCH 30/90] mtd: nand: sunxi: Convert from fdtdec to ofnode
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As a first step toward converting this driver to the driver model, use
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the ofnode abstraction to replace direct references to the FDT blob.
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Using ofnode_read_u32_index removes an extra pair of loops and makes the
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allwinner,rb property optional, matching the devicetree binding.
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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drivers/mtd/nand/raw/sunxi_nand.c | 73 +++++++++++--------------------
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include/fdtdec.h | 1 -
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lib/fdtdec.c | 1 -
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3 files changed, 26 insertions(+), 49 deletions(-)
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--- a/drivers/mtd/nand/raw/sunxi_nand.c
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+++ b/drivers/mtd/nand/raw/sunxi_nand.c
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@@ -25,11 +25,10 @@
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*/
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#include <common.h>
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-#include <fdtdec.h>
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+#include <dm.h>
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#include <malloc.h>
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#include <memalign.h>
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#include <nand.h>
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-#include <asm/global_data.h>
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#include <dm/device_compat.h>
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#include <dm/devres.h>
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#include <linux/bitops.h>
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@@ -45,8 +44,6 @@
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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-DECLARE_GLOBAL_DATA_PTR;
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-
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#define NFC_REG_CTL 0x0000
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#define NFC_REG_ST 0x0004
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#define NFC_REG_INT 0x0008
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@@ -1605,19 +1602,18 @@ static int sunxi_nand_ecc_init(struct mt
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return 0;
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}
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-static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum)
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+static int sunxi_nand_chip_init(ofnode np, struct sunxi_nfc *nfc, int devnum)
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{
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const struct nand_sdr_timings *timings;
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- const void *blob = gd->fdt_blob;
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struct sunxi_nand_chip *chip;
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struct mtd_info *mtd;
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struct nand_chip *nand;
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int nsels;
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int ret;
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int i;
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- u32 cs[8], rb[8];
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+ u32 tmp;
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- if (!fdt_getprop(blob, node, "reg", &nsels))
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+ if (!ofnode_get_property(np, "reg", &nsels))
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return -EINVAL;
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nsels /= sizeof(u32);
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@@ -1638,25 +1634,12 @@ static int sunxi_nand_chip_init(int node
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chip->selected = -1;
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for (i = 0; i < nsels; i++) {
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- cs[i] = -1;
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- rb[i] = -1;
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- }
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-
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- ret = fdtdec_get_int_array(gd->fdt_blob, node, "reg", cs, nsels);
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- if (ret) {
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- dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
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- return ret;
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- }
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-
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- ret = fdtdec_get_int_array(gd->fdt_blob, node, "allwinner,rb", rb,
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- nsels);
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- if (ret) {
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- dev_err(nfc->dev, "could not retrieve reg property: %d\n", ret);
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- return ret;
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- }
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-
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- for (i = 0; i < nsels; i++) {
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- int tmp = cs[i];
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+ ret = ofnode_read_u32_index(np, "reg", i, &tmp);
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+ if (ret) {
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+ dev_err(nfc->dev, "could not retrieve reg property: %d\n",
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+ ret);
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+ return ret;
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+ }
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if (tmp > NFC_MAX_CS) {
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dev_err(nfc->dev,
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@@ -1671,15 +1654,14 @@ static int sunxi_nand_chip_init(int node
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chip->sels[i].cs = tmp;
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- tmp = rb[i];
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- if (tmp >= 0 && tmp < 2) {
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+ if (!ofnode_read_u32_index(np, "allwinner,rb", i, &tmp) &&
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+ tmp < 2) {
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chip->sels[i].rb.type = RB_NATIVE;
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chip->sels[i].rb.info.nativeid = tmp;
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} else {
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- ret = gpio_request_by_name_nodev(offset_to_ofnode(node),
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- "rb-gpios", i,
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- &chip->sels[i].rb.info.gpio,
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- GPIOD_IS_IN);
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+ ret = gpio_request_by_name_nodev(np, "rb-gpios", i,
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+ &chip->sels[i].rb.info.gpio,
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+ GPIOD_IS_IN);
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if (ret)
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chip->sels[i].rb.type = RB_GPIO;
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else
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@@ -1711,7 +1693,7 @@ static int sunxi_nand_chip_init(int node
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* in the DT.
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*/
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nand->ecc.mode = NAND_ECC_HW;
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- nand->flash_node = offset_to_ofnode(node);
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+ nand->flash_node = np;
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nand->select_chip = sunxi_nfc_select_chip;
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nand->cmd_ctrl = sunxi_nfc_cmd_ctrl;
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nand->read_buf = sunxi_nfc_read_buf;
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@@ -1760,15 +1742,13 @@ static int sunxi_nand_chip_init(int node
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return 0;
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}
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-static int sunxi_nand_chips_init(int node, struct sunxi_nfc *nfc)
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+static int sunxi_nand_chips_init(ofnode node, struct sunxi_nfc *nfc)
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{
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- const void *blob = gd->fdt_blob;
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- int nand_node;
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+ ofnode nand_np;
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int ret, i = 0;
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- for (nand_node = fdt_first_subnode(blob, node); nand_node >= 0;
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- nand_node = fdt_next_subnode(blob, nand_node)) {
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- ret = sunxi_nand_chip_init(nand_node, nfc, i++);
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+ ofnode_for_each_subnode(nand_np, node) {
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+ ret = sunxi_nand_chip_init(nand_np, nfc, i++);
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if (ret)
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return ret;
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}
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@@ -1794,10 +1774,9 @@ static void sunxi_nand_chips_cleanup(str
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void sunxi_nand_init(void)
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{
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- const void *blob = gd->fdt_blob;
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struct sunxi_nfc *nfc;
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- fdt_addr_t regs;
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- int node;
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+ phys_addr_t regs;
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+ ofnode node;
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int ret;
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nfc = kzalloc(sizeof(*nfc), GFP_KERNEL);
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@@ -1808,18 +1787,18 @@ void sunxi_nand_init(void)
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init_waitqueue_head(&nfc->controller.wq);
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INIT_LIST_HEAD(&nfc->chips);
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- node = fdtdec_next_compatible(blob, 0, COMPAT_SUNXI_NAND);
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- if (node < 0) {
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+ node = ofnode_by_compatible(ofnode_null(), "allwinner,sun4i-a10-nand");
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+ if (!ofnode_valid(node)) {
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pr_err("unable to find nfc node in device tree\n");
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goto err;
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}
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- if (!fdtdec_get_is_enabled(blob, node)) {
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+ if (!ofnode_is_enabled(node)) {
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pr_err("nfc disabled in device tree\n");
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goto err;
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}
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- regs = fdtdec_get_addr(blob, node, "reg");
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+ regs = ofnode_get_addr(node);
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if (regs == FDT_ADDR_T_NONE) {
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pr_err("unable to find nfc address in device tree\n");
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goto err;
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--- a/include/fdtdec.h
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+++ b/include/fdtdec.h
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@@ -187,7 +187,6 @@ enum fdt_compat_id {
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COMPAT_INTEL_BAYTRAIL_FSP, /* Intel Bay Trail FSP */
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COMPAT_INTEL_BAYTRAIL_FSP_MDP, /* Intel FSP memory-down params */
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COMPAT_INTEL_IVYBRIDGE_FSP, /* Intel Ivy Bridge FSP */
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- COMPAT_SUNXI_NAND, /* SUNXI NAND controller */
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COMPAT_ALTERA_SOCFPGA_CLK, /* SoCFPGA Clock initialization */
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COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE, /* SoCFPGA pinctrl-single */
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COMPAT_ALTERA_SOCFPGA_H2F_BRG, /* SoCFPGA hps2fpga bridge */
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--- a/lib/fdtdec.c
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+++ b/lib/fdtdec.c
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@@ -64,7 +64,6 @@ static const char * const compat_names[C
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COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
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COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
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COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
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- COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
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COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
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COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
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COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
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