openwrt/target/linux/ramips/dts/mt7620a_domywifi.dtsi
Shiji Yang da42c329c6
ramips: convert rt2x00 EEPROM to NVMEM format
This patch converts legacy Ralink SoCs and MT7620 WiFi calibration
data to NVMEM format. The EEPROM size is 0x200.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2023-10-17 12:07:26 +02:00

192 lines
2.9 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_system_amber;
led-failsafe = &led_system_amber;
led-running = &led_system_green;
led-upgrade = &led_system_amber;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_system_green: system_green {
label = "green:system";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
led_system_amber: system_amber {
label = "amber:system";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
};
internet_green {
label = "green:internet";
gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
};
internet_amber {
label = "amber:internet";
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "amber:lan1";
gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "amber:lan2";
gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "amber:lan3";
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "amber:lan4";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
};
wan {
label = "amber:wan";
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "green:wlan2g";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "config";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
compatible = "nvmem-cells";
label = "factory";
reg = <0x40000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&state_default {
gpio {
groups = "uartf", "rgmii1", "wled";
function = "gpio";
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mediatek,portmap = "wllll";
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
};
&sdhci {
status = "okay";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <0>;
led-active-low;
};
};
};
&wmac {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};