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da42c329c6
This patch converts legacy Ralink SoCs and MT7620 WiFi calibration data to NVMEM format. The EEPROM size is 0x200. Signed-off-by: Shiji Yang <yangshiji66@qq.com>
166 lines
2.7 KiB
Plaintext
Executable File
166 lines
2.7 KiB
Plaintext
Executable File
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "dlink,dir-806a-b1", "ralink,mt7620a-soc";
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model = "D-Link DIR-806A B1";
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aliases {
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led-boot = &wps_led;
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led-failsafe = &wps_led;
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led-running = &wps_led;
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led-upgrade = &wps_led;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; // #12
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linux,code = <KEY_RESTART>;
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};
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};
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leds {
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compatible = "gpio-leds";
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wifi_led: 2.4g {
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label = "green:wlan";
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WLAN;
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; // #72
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};
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wps_led: wps {
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label = "green:wps";
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WPS;
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gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; // #39
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <48000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "ALL";
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reg = <0x0 0x800000>;
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read-only;
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};
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partition@0_1 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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};
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factory: partition@40000 {
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compatible = "nvmem-cells";
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label = "Factory";
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reg = <0x40000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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read-only;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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macaddr_factory_8004: macaddr@8004 {
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reg = <0x8004 0x6>;
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};
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uartf", "ephy";
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function = "gpio";
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};
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};
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ðernet {
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(-2)>;
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};
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&wmac {
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pinctrl-names = "default", "pa_gpio";
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pinctrl-0 = <&pa_pins>;
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pinctrl-1 = <&pa_gpio_pins>;
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nvmem-cells = <&eeprom_factory_0>, <&macaddr_factory_4>;
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nvmem-cell-names = "eeprom", "mac-address";
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mac-address-increment = <(-1)>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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wifi@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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nvmem-cells = <&macaddr_factory_8004>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <(-3)>;
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led {
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led-active-low;
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};
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};
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};
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