openwrt/target/linux/ramips/dts/mt7620a_zyxel_keenetic-viva.dts
Mieczyslaw Nalewaj df28fe4b59 kernel: rtl8367b: remove unnecessary cpu_port setting
Set the appropriate cpu_port value based on the use of realtek,extif0 to extif2
instead of the additional cpu_port parameter.

Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
Link: https://github.com/openwrt/openwrt/pull/15033
Signed-off-by: Robert Marko <robimarko@gmail.com>
2024-06-08 16:28:37 +02:00

195 lines
3.2 KiB
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#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "zyxel,keenetic-viva", "ralink,mt7620a-soc";
model = "ZyXEL Keenetic Viva";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_green;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
leds {
compatible = "gpio-leds";
wan {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
usb {
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>;
linux,default-trigger = "usbport";
};
power_alert {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
wifi {
label = "green:wifi";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
led_power_green: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
fn {
label = "fn";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
};
};
gpio_export {
compatible = "gpio-export";
#size-cells = <0>;
usb_power {
gpio-export,name = "usb";
gpio-export,output = <1>;
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
};
};
rtl8367rb {
compatible = "realtek,rtl8367b";
realtek,extif2 = <1 0 1 1 1 1 1 1 2>;
mii-bus = <&mdio0>;
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c", "uartf";
function = "gpio";
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins &mdio_pins>;
nvmem-cells = <&macaddr_factory_4>;
nvmem-cell-names = "mac-address";
port@4 {
status = "okay";
mediatek,fixed-link = <1000 1 1 1>;
phy-mode = "rgmii";
phy-handle = <&phy4>;
};
mdio0: mdio-bus {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
};
&gsw {
mediatek,port4-gmac;
mediatek,ephy-base = /bits/ 8 <8>;
};
&wmac {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};