mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 06:57:57 +00:00
5ef783c1b2
Signed-off-by: Felix Fietkau <nbd@nbd.name>
61 lines
2.2 KiB
Diff
61 lines
2.2 KiB
Diff
From 9d32637122de88f1ef614c29703f0e050cad342e Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
|
|
Date: Wed, 1 Feb 2023 19:23:30 +0100
|
|
Subject: [PATCH] net: mediatek: sgmii: fix duplex configuration
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
The logic of the duplex bit is inverted. Setting it means half
|
|
duplex, not full duplex.
|
|
|
|
Fix and rename macro to avoid confusion.
|
|
|
|
Fixes: 7e538372694b ("net: ethernet: mediatek: Re-add support SGMII")
|
|
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
|
|
Signed-off-by: Bjørn Mork <bjorn@mork.no>
|
|
Acked-by: Daniel Golle <daniel@makrotopia.org>
|
|
Tested-by: Daniel Golle <daniel@makrotopia.org>
|
|
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
---
|
|
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 2 +-
|
|
drivers/net/ethernet/mediatek/mtk_sgmii.c | 6 +++---
|
|
2 files changed, 4 insertions(+), 4 deletions(-)
|
|
|
|
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
|
|
@@ -523,7 +523,7 @@
|
|
#define SGMII_SPEED_10 FIELD_PREP(SGMII_SPEED_MASK, 0)
|
|
#define SGMII_SPEED_100 FIELD_PREP(SGMII_SPEED_MASK, 1)
|
|
#define SGMII_SPEED_1000 FIELD_PREP(SGMII_SPEED_MASK, 2)
|
|
-#define SGMII_DUPLEX_FULL BIT(4)
|
|
+#define SGMII_DUPLEX_HALF BIT(4)
|
|
#define SGMII_IF_MODE_BIT5 BIT(5)
|
|
#define SGMII_REMOTE_FAULT_DIS BIT(8)
|
|
#define SGMII_CODE_SYNC_SET_VAL BIT(9)
|
|
--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
|
|
@@ -66,7 +66,7 @@ static int mtk_pcs_setup_mode_force(stru
|
|
|
|
/* Set the speed etc but leave the duplex unchanged */
|
|
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
|
|
- val &= SGMII_DUPLEX_FULL | ~SGMII_IF_MODE_MASK;
|
|
+ val &= SGMII_DUPLEX_HALF | ~SGMII_IF_MODE_MASK;
|
|
val |= SGMII_SPEED_1000;
|
|
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
|
|
|
|
@@ -131,9 +131,10 @@ static void mtk_pcs_link_up(struct phyli
|
|
|
|
/* SGMII force duplex setting */
|
|
regmap_read(mpcs->regmap, SGMSYS_SGMII_MODE, &val);
|
|
- val &= ~SGMII_DUPLEX_FULL;
|
|
- if (duplex == DUPLEX_FULL)
|
|
- val |= SGMII_DUPLEX_FULL;
|
|
+
|
|
+ val &= ~SGMII_DUPLEX_HALF;
|
|
+ if (duplex != DUPLEX_FULL)
|
|
+ val |= SGMII_DUPLEX_HALF;
|
|
|
|
regmap_write(mpcs->regmap, SGMSYS_SGMII_MODE, val);
|
|
}
|