openwrt/target/linux/ramips/dts/PSG1208.dts
INAGAKI Hiroshi d70ec3008d ramips: specify "firmware" partition format
Specify firmware partition format by compatible string.

formats in ramips:

- denx,uimage
- tplink,firmware
- seama

It's unlikely but the firmware splitting might not work any longer for
the following boards, due to a custom header:

- EX2700: two uImage headers
- BR-6478AC-V2: edimax-header
- 3G-6200N: edimax-header
- 3G-6200NL: edimax-header
- BR-6475ND: edimax-header
- TEW-638APB-V2: umedia-header
- RT-N56U: mkrtn56uimg

But it rather looks like the uImage splitter is fine with the extra
header.

The following dts are not touched, due to lack of a compatible string in
the matching firmware splitter submodule:

- CONFIG_MTD_SPLIT_JIMAGE_FW
    DWR-116-A1.dts
    DWR-118-A2.dts
    DWR-512-B.dts
    DWR-921-C1.dts
    LR-25G001.dts
- CONFIG_MTD_SPLIT_TRX_FW
    WCR-1166DS.dts
    WSR-1166.dts
- CONFIG_MTD_SPLIT_MINOR_FW
    RBM11G.dts
    RBM33G.dts
- CONFIG_MTD_SPLIT_LZMA_FW
    AR670W.dts
- CONFIG_MTD_SPLIT_WRGG_FW
    DAP-1522-A1.dts

Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
2018-11-29 13:15:44 +01:00

124 lines
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/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "phicomm,psg1208", "ralink,mt7620a-soc";
model = "Phicomm PSG1208";
aliases {
led-boot = &led_wps;
led-failsafe = &led_wps;
led-running = &led_wps;
led-upgrade = &led_wps;
};
gpio-leds {
compatible = "gpio-leds";
led_wps: wps {
label = "psg1208:white:wps";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
wlan {
label = "psg1208:white:wlan2g";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@20000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@30000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@40000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "spi refclk", "wled";
ralink,function = "gpio";
};
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "llllw";
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};