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94 lines
3.3 KiB
C
94 lines
3.3 KiB
C
/*
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* Hifn HIPP-I/HIPP-II (7855/8155) driver.
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* Copyright (c) 2006 Michael Richardson <mcr@xelerance.com> *
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Effort sponsored by Hifn inc.
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*
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*/
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#ifndef __HIFNHIPPVAR_H__
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#define __HIFNHIPPVAR_H__
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#define HIPP_MAX_CHIPS 8
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/*
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* Holds data specific to a single Hifn HIPP-I board.
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*/
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struct hipp_softc {
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softc_device_decl sc_dev;
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struct pci_dev *sc_pcidev; /* device backpointer */
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ocf_iomem_t sc_bar[5];
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caddr_t sc_barphy[5]; /* physical address */
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int sc_num; /* for multiple devs */
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spinlock_t sc_mtx; /* per-instance lock */
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int32_t sc_cid;
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int sc_irq;
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#if 0
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u_int32_t sc_dmaier;
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u_int32_t sc_drammodel; /* 1=dram, 0=sram */
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u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */
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struct hifn_dma *sc_dma;
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dma_addr_t sc_dma_physaddr;/* physical address of sc_dma */
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int sc_dmansegs;
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int sc_maxses;
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int sc_nsessions;
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struct hifn_session *sc_sessions;
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int sc_ramsize;
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int sc_flags;
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#define HIFN_HAS_RNG 0x1 /* includes random number generator */
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#define HIFN_HAS_PUBLIC 0x2 /* includes public key support */
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#define HIFN_HAS_AES 0x4 /* includes AES support */
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#define HIFN_IS_7811 0x8 /* Hifn 7811 part */
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#define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */
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struct timer_list sc_tickto; /* for managing DMA */
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int sc_rngfirst;
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int sc_rnghz; /* RNG polling frequency */
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int sc_c_busy; /* command ring busy */
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int sc_s_busy; /* source data ring busy */
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int sc_d_busy; /* destination data ring busy */
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int sc_r_busy; /* result ring busy */
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int sc_active; /* for initial countdown */
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int sc_needwakeup; /* ops q'd wating on resources */
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int sc_curbatch; /* # ops submitted w/o int */
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int sc_suspended;
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struct miscdevice sc_miscdev;
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#endif
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};
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#define HIPP_LOCK(_sc) spin_lock_irqsave(&(_sc)->sc_mtx, l_flags)
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#define HIPP_UNLOCK(_sc) spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags)
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#endif /* __HIFNHIPPVAR_H__ */
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