openwrt/target/linux/bcm27xx/patches-6.6/950-0617-drm-vc4-txp-Handle-40-bits-DMA-Addresses.patch
Álvaro Fernández Rojas 8c405cdccc bcm27xx: add 6.6 kernel patches
The patches were generated from the RPi repo with the following command:
git format-patch v6.6.34..rpi-6.1.y

Some patches needed rebasing and, as usual, the applied and reverted, wireless
drivers, Github workflows, READMEs and defconfigs patches were removed.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2024-06-18 18:52:49 +02:00

60 lines
1.9 KiB
Diff

From 9d5ee85bf2da64748bbec41deba5a432eb23f959 Mon Sep 17 00:00:00 2001
From: Maxime Ripard <maxime@cerno.tech>
Date: Fri, 14 Apr 2023 17:47:11 +0200
Subject: [PATCH 0617/1085] drm/vc4: txp: Handle 40-bits DMA Addresses
The BCM2712 MOP and MOPLET can handle addresses larger than 32bits
through an extra register. We can easily support it and make it
conditional based on the compatible through a boolean in our variant
structure.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
drivers/gpu/drm/vc4/vc4_drv.h | 1 +
drivers/gpu/drm/vc4/vc4_txp.c | 10 +++++++++-
2 files changed, 10 insertions(+), 1 deletion(-)
--- a/drivers/gpu/drm/vc4/vc4_drv.h
+++ b/drivers/gpu/drm/vc4/vc4_drv.h
@@ -550,6 +550,7 @@ struct vc4_txp_data {
struct vc4_crtc_data base;
unsigned int has_byte_enable:1;
unsigned int size_minus_one:1;
+ unsigned int supports_40bit_addresses:1;
};
extern const struct vc4_txp_data bcm2835_txp_data;
--- a/drivers/gpu/drm/vc4/vc4_txp.c
+++ b/drivers/gpu/drm/vc4/vc4_txp.c
@@ -145,6 +145,8 @@
/* Number of lines received and committed to memory. */
#define TXP_PROGRESS 0x10
+#define TXP_DST_PTR_HIGH 0x1c
+
#define TXP_READ(offset) \
({ \
kunit_fail_current_test("Accessing a register in a unit test!\n"); \
@@ -293,6 +295,7 @@ static void vc4_txp_connector_atomic_com
struct drm_framebuffer *fb;
unsigned int hdisplay;
unsigned int vdisplay;
+ dma_addr_t addr;
u32 ctrl;
int idx;
int i;
@@ -330,7 +333,12 @@ static void vc4_txp_connector_atomic_com
return;
gem = drm_fb_dma_get_gem_obj(fb, 0);
- TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]);
+ addr = gem->dma_addr + fb->offsets[0];
+ TXP_WRITE(TXP_DST_PTR, lower_32_bits(addr));
+
+ if (txp_data->supports_40bit_addresses)
+ TXP_WRITE(TXP_DST_PTR_HIGH, upper_32_bits(addr) & 0xff);
+
TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]);
hdisplay = mode->hdisplay ?: 1;