mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 16:31:13 +00:00
e3559fb445
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.54 Removed upstreamed: generic/backport-6.1/020-v6.3-02-UPSTREAM-mm-multi-gen-LRU-rename-lrugen-lists-to-lru.patch[1] ipq806x/patches-6.1/140-v6.5-hwspinlock-qcom-add-missing-regmap-config-for-SFPB-M.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.54&id=a73d04c460521e45f257d28d73df096e41ece324 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.54&id=e93bc372dbc0bde133c854c03502a95617041972 Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia <therealgraysky@proton.me>
62 lines
1.5 KiB
Diff
62 lines
1.5 KiB
Diff
From 79b38b9f85da868ca59b66715c20aa55104b640b Mon Sep 17 00:00:00 2001
|
|
From: Robert Marko <robert.marko@sartura.hr>
|
|
Date: Fri, 2 Oct 2020 10:43:26 +0200
|
|
Subject: [PATCH] arm: dts: ipq4019: QCA807x properties
|
|
|
|
This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
|
|
|
|
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
|
|
---
|
|
arch/arm/boot/dts/qcom-ipq4019.dtsi | 17 +++++++++++++++++
|
|
1 file changed, 17 insertions(+)
|
|
|
|
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
|
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
|
|
@@ -8,6 +8,7 @@
|
|
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
+#include <dt-bindings/net/qcom-qca807x.h>
|
|
|
|
/ {
|
|
#address-cells = <1>;
|
|
@@ -727,22 +728,38 @@
|
|
|
|
ethphy0: ethernet-phy@0 {
|
|
reg = <0>;
|
|
+
|
|
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
|
};
|
|
|
|
ethphy1: ethernet-phy@1 {
|
|
reg = <1>;
|
|
+
|
|
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
|
};
|
|
|
|
ethphy2: ethernet-phy@2 {
|
|
reg = <2>;
|
|
+
|
|
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
|
};
|
|
|
|
ethphy3: ethernet-phy@3 {
|
|
reg = <3>;
|
|
+
|
|
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
|
};
|
|
|
|
ethphy4: ethernet-phy@4 {
|
|
reg = <4>;
|
|
+
|
|
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
|
|
+ };
|
|
+
|
|
+ psgmiiphy: psgmii-phy@5 {
|
|
+ reg = <5>;
|
|
+
|
|
+ qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
|
|
};
|
|
};
|
|
|