mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
28 lines
1.1 KiB
Diff
28 lines
1.1 KiB
Diff
From c1fffc2a7dbf7e59aaef36378fb14d1c3dc016a6 Mon Sep 17 00:00:00 2001
|
|
From: Eric Anholt <eric@anholt.net>
|
|
Date: Fri, 3 Aug 2018 11:22:27 +0200
|
|
Subject: [PATCH 756/806] drm/vc4: Fix TILE_Y_OFFSET definitions
|
|
|
|
Y_OFFSET field starts at bit 8 not 7.
|
|
|
|
Signed-off-by: Eric Anholt <eric@anholt.net>
|
|
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
|
|
Link: https://patchwork.freedesktop.org/patch/msgid/20180803092231.26446-1-boris.brezillon@bootlin.com
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_regs.h | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_regs.h
|
|
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
|
|
@@ -1043,8 +1043,8 @@ enum hvs_pixel_format {
|
|
#define SCALER_PITCH0_TILE_LINE_DIR BIT(15)
|
|
#define SCALER_PITCH0_TILE_INITIAL_LINE_DIR BIT(14)
|
|
/* Y offset within a tile. */
|
|
-#define SCALER_PITCH0_TILE_Y_OFFSET_MASK VC4_MASK(13, 7)
|
|
-#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT 7
|
|
+#define SCALER_PITCH0_TILE_Y_OFFSET_MASK VC4_MASK(13, 8)
|
|
+#define SCALER_PITCH0_TILE_Y_OFFSET_SHIFT 8
|
|
#define SCALER_PITCH0_TILE_WIDTH_R_MASK VC4_MASK(6, 0)
|
|
#define SCALER_PITCH0_TILE_WIDTH_R_SHIFT 0
|
|
|