mirror of
https://github.com/openwrt/openwrt.git
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d46e13d864
The device tree file was in DOS format (CR-LF). Convert it to UNIX style.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit d28534545e)
561 lines
10 KiB
Plaintext
561 lines
10 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2021 MediaTek Inc.
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* Author: Sam.Shih <sam.shih@mediatek.com>
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*/
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/dts-v1/;
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#include "mt7986a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Zyxel EX5601-T0";
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compatible = "zyxel,ex5601-t0", "mediatek,mt7986a-rfb-snand";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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gpio-keys {
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compatible = "gpio-keys";
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poll-interval = <20>;
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reset-button {
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label = "reset";
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gpios = <&pio 21 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wlan-button {
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label = "wlan";
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WLAN>;
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};
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wps-button {
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label = "wps";
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gpios = <&pio 56 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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zyleds {
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compatible = "gpio-leds";
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led_green_wifi24g {
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label = "zyled-green-wifi24g";
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led_green_wifi5g {
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label = "zyled-green-wifi5g";
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gpios = <&pio 2 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led_green_inet {
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label = "zyled-green-inet";
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gpios = <&pio 14 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led_red_inet {
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label = "zyled-red-inet";
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gpios = <&pio 15 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led_green_pwr {
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label = "zyled-green-pwr";
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gpios = <&pio 13 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "timer"; /* Default blinking */
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led-pattern = <125 125>; /* Fast blink is 4 HZ */
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};
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led_red_pwr {
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label = "zyled-red-pwr";
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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led_green_fxs {
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label = "zyled-green-fxs";
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gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led_amber_fxs {
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label = "zyled-amber-fxs";
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gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led_amber_wps24g {
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label = "zyled-amber-wps24g";
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gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led_amber_wps5g {
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label = "zyled-amber-wps5g";
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gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led_green_lan {
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label = "zyled-green-lan";
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gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led_green_sfp {
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label = "zyled-green-sfp";
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gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_factory_002a>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-mode = "2500base-x";
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phy = <&phy6>;
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nvmem-cells = <&macaddr_factory_0024>;
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nvmem-cell-names = "mac-address";
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
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reset-delay-us = <1500000>;
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reset-post-delay-us = <1000000>;
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phy5: phy@5 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <5>;
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};
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phy6: phy@6 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <6>;
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};
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switch@0 {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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};
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port@5 {
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reg = <5>;
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label = "lan4";
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phy-mode = "2500base-x";
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phy = <&phy5>;
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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};
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&wmac {
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status = "okay";
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pinctrl-names = "default", "dbdc";
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pinctrl-0 = <&wf_2g_5g_pins>;
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pinctrl-1 = <&wf_dbdc_pins>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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nvmem-cells = <&macaddr_factory_0004>;
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nvmem-cell-names = "mac-address";
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};
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&crypto {
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default", "state_uhs";
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pinctrl-0 = <&mmc0_pins_default>;
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pinctrl-1 = <&mmc0_pins_uhs>;
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bus-width = <8>;
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max-frequency = <200000000>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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hs400-ds-delay = <0x14014>;
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vmmc-supply = <®_3p3v>;
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vqmmc-supply = <®_1p8v>;
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non-removable;
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no-sd;
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no-sdio;
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status = "disabled";
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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};
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&pcie_phy {
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status = "okay";
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};
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&pio {
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mmc0_pins_default: mmc0-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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mmc0_pins_uhs: mmc0-uhs-pins {
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mux {
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function = "emmc";
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groups = "emmc_51";
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};
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conf-cmd-dat {
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pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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input-enable;
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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conf-clk {
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pins = "EMMC_CK";
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drive-strength = <6>;
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-ds {
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pins = "EMMC_DSL";
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mediatek,pull-down-adv = <2>; /* pull-down 50K */
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};
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conf-rst {
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pins = "EMMC_RSTB";
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drive-strength = <4>;
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mediatek,pull-up-adv = <1>; /* pull-up 10K */
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};
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};
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pcie_pins: pcie-pins {
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mux {
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function = "pcie";
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groups = "pcie_clk", "pcie_wake", "pcie_pereset";
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};
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};
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spic_pins_g2: spic-pins-29-to-32 {
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mux {
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function = "spi";
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groups = "spi1_2";
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};
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};
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spi_flash_pins: spi-flash-pins-33-to-38 {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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drive-strength = <8>;
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mediatek,pull-down-adv = <0>; /* bias-disable */
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};
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};
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uart1_pins: uart1-pins {
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mux {
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function = "uart";
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groups = "uart1";
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};
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};
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uart2_pins: uart2-pins {
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mux {
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function = "uart";
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groups = "uart2";
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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wf_dbdc_pins: wf_dbdc-pins {
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mux {
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function = "wifi";
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groups = "wf_dbdc";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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cs-gpios = <0>, <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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spi_nand: spi_nand@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <1>;
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spi-max-frequency = <10000000>;
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spi-tx-buswidth = <4>;
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spi-rx-buswidth = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x00000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x0100000 0x0080000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x0200000>;
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read-only;
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x01C0000>;
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read-only;
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};
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partition@540000 {
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label = "zloader";
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reg = <0x540000 0x0040000>;
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read-only;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x4000000>;
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};
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partition@4580000 {
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label = "ubi2";
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reg = <0x4580000 0x4000000>;
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read-only;
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};
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partition@8580000 {
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label = "zyubi";
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reg = <0x8580000 0x15A80000>;
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};
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};
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};
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spic_pins_g2>;
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status = "okay";
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proslic_spi: proslic_spi@0 {
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compatible = "silabs,proslic_spi";
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reg = <0>;
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spi-max-frequency = <10000000>;
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spi-cpha = <1>;
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spi-cpol = <1>;
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channel_count = <1>;
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debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
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reset_gpio = <&pio 7 GPIO_ACTIVE_HIGH>;
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ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
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};
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};
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&ssusb {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins>;
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_0004: macaddr@0004 {
|
|
reg = <0x0004 0x6>;
|
|
};
|
|
|
|
macaddr_factory_0024: macaddr@0024 {
|
|
reg = <0x0024 0x6>;
|
|
};
|
|
|
|
macaddr_factory_002a: macaddr@002a {
|
|
reg = <0x002a 0x6>;
|
|
};
|
|
};
|