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62d5ece70b
Several devices in mt76x8 subtarget use the following line to set up wmac in their DTS(I) files: ralink,mtd-eeprom = <&factory 0x4> This is strange for several reasons: - They should use mediatek,mtd-eeprom on this SOC - The caldata is supposed to start at 0x0 - The parent DTSI mt7628an.dtsi specifies mediatek,mtd-eeprom anyway, starting from 0x0 - The offset coincides with the default location of the MAC address in caldata Based on the comment inb28e94d4bf("ramips: MiWiFi Nano fixes"), it looks like the author for this device wanted to actually use mtd-mac-address instead of ralink,mtd-eeprom. A check on the same device revealed that actually the MAC address start at offset 4 there, so the correct caldata offset is 0x0. Based on these findings, and the fact that the expected location on this SOC is 0x0, we remove the "ralink,mtd-eeprom = <&factory 0x4>" statement from all devices in ramips (being only mt7628an anyway). Thanks to Sungbo Eo for finding and researching this. Reported-by: Sungbo Eo <mans0n@gorani.run> Fixes:b28e94d4bf("ramips: MiWiFi Nano fixes") Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> (cherry picked from commit09d38a3bc3)
156 lines
2.6 KiB
Plaintext
156 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "mt7628an.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "totolink,lr1200", "mediatek,mt7628dan";
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model = "TOTOLINK LR1200";
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aliases {
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led-boot = &led_sys;
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led-failsafe = &led_sys;
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led-running = &led_sys;
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led-upgrade = &led_sys;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x4000000>;
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};
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leds {
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compatible = "gpio-leds";
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led_sys: sys {
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label = "lr1200:blue:sys";
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gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
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};
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sms {
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label = "lr1200:blue:sms";
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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};
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wifi {
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label = "lr1200:blue:wifi";
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gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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3g {
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label = "lr1200:blue:3g";
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gpios = <&gpio0 4 GPIO_ACTIVE_LOW>;
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};
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4g {
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label = "lr1200:blue:4g";
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gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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};
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rssi1 {
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label = "lr1200:blue:rssi1";
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gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
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};
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rssi2 {
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label = "lr1200:blue:rssi2";
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gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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};
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rssi3 {
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label = "lr1200:blue:rssi3";
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gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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};
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rssi4 {
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label = "lr1200:blue:rssi4";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&gpio1 {
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gpio_modem_reset {
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gpio-hog;
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gpios = <13 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "modem-reset";
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "gpio", "i2c", "i2s", "refclk", "uart1", "wdt", "wled_an";
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ralink,function = "gpio";
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&wmac {
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status = "okay";
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};
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ðernet {
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mtd-mac-address = <&factory 0x28>;
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};
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&spi0 {
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status = "okay";
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m25p80@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0x7b0000>;
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};
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};
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};
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};
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