mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 09:39:00 +00:00
524b9aeb4c
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
41 lines
1.7 KiB
Diff
41 lines
1.7 KiB
Diff
From def26913b66fd94e431afecf28e09c08e8c02a35 Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
|
|
Date: Fri, 27 Nov 2020 12:14:42 +0100
|
|
Subject: [PATCH] reset: simple: add BCM4908 MISC PCIe reset controller support
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
It's a trivial reset controller. One register with bit per PCIe core.
|
|
|
|
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
|
|
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
|
|
---
|
|
drivers/reset/Kconfig | 2 +-
|
|
drivers/reset/reset-simple.c | 2 ++
|
|
2 files changed, 3 insertions(+), 1 deletion(-)
|
|
|
|
--- a/drivers/reset/Kconfig
|
|
+++ b/drivers/reset/Kconfig
|
|
@@ -129,7 +129,7 @@ config RESET_SCMI
|
|
|
|
config RESET_SIMPLE
|
|
bool "Simple Reset Controller Driver" if COMPILE_TEST
|
|
- default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC
|
|
+ default ARCH_BCM4908 || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC
|
|
help
|
|
This enables a simple reset controller driver for reset lines that
|
|
that can be asserted and deasserted by toggling bits in a contiguous,
|
|
--- a/drivers/reset/reset-simple.c
|
|
+++ b/drivers/reset/reset-simple.c
|
|
@@ -127,6 +127,8 @@ static const struct of_device_id reset_s
|
|
{ .compatible = "aspeed,ast2500-lpc-reset" },
|
|
{ .compatible = "bitmain,bm1880-reset",
|
|
.data = &reset_simple_active_low },
|
|
+ { .compatible = "brcm,bcm4908-misc-pcie-reset",
|
|
+ .data = &reset_simple_active_low },
|
|
{ .compatible = "snps,dw-high-reset" },
|
|
{ .compatible = "snps,dw-low-reset",
|
|
.data = &reset_simple_active_low },
|