mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 14:37:57 +00:00
7774b86019
Add the missing pinctrl properties on the ethernet node. GMAC1 will start working with this change. Link: https://lore.kernel.org/netdev/83a35aa3-6cb8-2bc4-2ff4-64278bbcd8c8@arinc9.com/ Overwrite pinctrl-0 property without rgmii2_pins on devicetrees which use the rgmii2 pins as GPIO (22 - 33). Give gpio function to rgmii2 pin group on mt7621_tplink_archer-x6-v3.dtsi which uses GPIO 28. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
192 lines
2.9 KiB
Plaintext
192 lines
2.9 KiB
Plaintext
#include "mt7621.dtsi"
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
/ {
|
|
compatible = "mtc,wr1201", "mediatek,mt7621-soc";
|
|
model = "MTC Wireless Router WR1201";
|
|
|
|
aliases {
|
|
led-boot = &led_power;
|
|
led-failsafe = &led_power;
|
|
led-running = &led_power;
|
|
led-upgrade = &led_power;
|
|
label-mac-device = &gmac0;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led_power: power {
|
|
label = "green:power";
|
|
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
usb {
|
|
label = "green:usb";
|
|
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
|
|
trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
|
|
linux,default-trigger = "usbport";
|
|
};
|
|
|
|
eth_link {
|
|
label = "green:eth_link";
|
|
gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
label = "green:wps";
|
|
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
label = "reset";
|
|
gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <10000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "Bootloader";
|
|
reg = <0x0 0x30000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@30000 {
|
|
label = "Config";
|
|
reg = <0x30000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
factory: partition@40000 {
|
|
label = "factory";
|
|
reg = <0x40000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
compatible = "denx,uimage";
|
|
label = "firmware";
|
|
reg = <0x50000 0xfa0000>;
|
|
};
|
|
|
|
partition@ff0000 {
|
|
label = "Second_Config";
|
|
reg = <0xff0000 0x10000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
ðernet {
|
|
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
|
|
};
|
|
|
|
&gmac0 {
|
|
nvmem-cells = <&macaddr_factory_4>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
|
|
&switch0 {
|
|
ports {
|
|
port@0 {
|
|
status = "okay";
|
|
label = "lan4";
|
|
};
|
|
|
|
port@1 {
|
|
status = "okay";
|
|
label = "lan3";
|
|
};
|
|
|
|
port@2 {
|
|
status = "okay";
|
|
label = "lan2";
|
|
};
|
|
|
|
port@3 {
|
|
status = "okay";
|
|
label = "lan1";
|
|
};
|
|
|
|
port@4 {
|
|
status = "okay";
|
|
label = "wan";
|
|
nvmem-cells = <&macaddr_factory_4>;
|
|
nvmem-cell-names = "mac-address";
|
|
mac-address-increment = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&sdhci {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie0 {
|
|
wifi@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x8000>;
|
|
ieee80211-freq-limit = <5000000 6000000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pcie1 {
|
|
wifi@0,0 {
|
|
reg = <0x0000 0 0 0 0>;
|
|
mediatek,mtd-eeprom = <&factory 0x0000>;
|
|
ieee80211-freq-limit = <2400000 2500000>;
|
|
|
|
led {
|
|
led-sources = <2>;
|
|
led-active-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&state_default {
|
|
gpio {
|
|
groups = "rgmii2";
|
|
function = "gpio";
|
|
};
|
|
};
|
|
|
|
&factory {
|
|
compatible = "nvmem-cells";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_factory_4: macaddr@4 {
|
|
reg = <0x4 0x6>;
|
|
};
|
|
};
|