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e05b24175d
Reorder nanopc t6 patches to 055 to avoid conflict with nanopi r6c patches.
Fixes: 55c46cbabd ("rockchip: add FriendlyElec NanoPi R6C")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16461
Signed-off-by: Nick Hainke <vincent@systemli.org>
41 lines
1.2 KiB
Diff
41 lines
1.2 KiB
Diff
From a22a629c63b1addcf2d81eaf30383c1deca5b7a9 Mon Sep 17 00:00:00 2001
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From: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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Date: Thu, 29 Aug 2024 14:26:56 +0200
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Subject: [PATCH] arm64: dts: rockchip: add SPI flash on NanoPC-T6
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FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
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It is populated with 32MB one on LTS version.
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Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
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Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
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Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
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@@ -560,6 +560,21 @@
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status = "okay";
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};
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+/* optional on non-LTS, populated on LTS version */
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+&sfc {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&fspim1_pins>;
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+ status = "okay";
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+
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+ flash@0 {
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+ compatible = "jedec,spi-nor";
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+ reg = <0>;
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+ spi-max-frequency = <104000000>;
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+ spi-rx-bus-width = <4>;
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+ spi-tx-bus-width = <1>;
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+ };
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+};
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+
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&spi2 {
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status = "okay";
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assigned-clocks = <&cru CLK_SPI2>;
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