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Deleted (upstreamed): bcm27xx/patches-5.10/950-0669-drm-vc4-hdmi-Make-sure-the-device-is-powered-with-CE.patch [1] bcm27xx/patches-5.10/950-0672-drm-vc4-hdmi-Move-initial-register-read-after-pm_run.patch [1] gemini/patches-5.10/0003-ARM-dts-gemini-NAS4220-B-fis-index-block-with-128-Ki.patch [2] Manually rebased: bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch Manually reverted: generic/pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch [3] [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=55b10b88ac8654fc2f31518aa349a2e643b37f18 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=958a8819d41420d7a74ed922a09cacc0ba3a4218 [3] https://lore.kernel.org/all/trinity-2a727d96-0335-4d03-8f30-e22a0e10112d-1643363480085@3c-app-gmx-bap33/ Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
61 lines
2.0 KiB
Diff
61 lines
2.0 KiB
Diff
From b4627f9f36d8af7cb7bf24d8c1daee8b48f12299 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Mon, 11 Jan 2021 15:23:02 +0100
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Subject: [PATCH] drm/vc4: hdmi: Introduce a CEC clock
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While the BCM2835 had the CEC clock derived from the HSM clock, the
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BCM2711 has a dedicated parent clock for it.
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Let's introduce a separate clock for it so that we can handle both
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cases.
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Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_hdmi.c | 9 ++++++++-
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drivers/gpu/drm/vc4/vc4_hdmi.h | 1 +
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2 files changed, 9 insertions(+), 1 deletion(-)
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -151,7 +151,7 @@ static void vc4_hdmi_cec_update_clk_div(
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* Set the clock divider: the hsm_clock rate and this divider
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* setting will give a 40 kHz CEC clock.
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*/
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- clk_cnt = clk_get_rate(vc4_hdmi->hsm_clock) / CEC_CLOCK_FREQ;
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+ clk_cnt = clk_get_rate(vc4_hdmi->cec_clock) / CEC_CLOCK_FREQ;
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value |= clk_cnt << VC4_HDMI_CEC_DIV_CLK_CNT_SHIFT;
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HDMI_WRITE(HDMI_CEC_CNTRL_1, value);
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}
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@@ -1875,6 +1875,7 @@ static int vc4_hdmi_init_resources(struc
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return PTR_ERR(vc4_hdmi->hsm_clock);
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}
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vc4_hdmi->audio_clock = vc4_hdmi->hsm_clock;
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+ vc4_hdmi->cec_clock = vc4_hdmi->hsm_clock;
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return 0;
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}
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@@ -1969,6 +1970,12 @@ static int vc5_hdmi_init_resources(struc
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return PTR_ERR(vc4_hdmi->audio_clock);
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}
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+ vc4_hdmi->cec_clock = devm_clk_get(dev, "cec");
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+ if (IS_ERR(vc4_hdmi->cec_clock)) {
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+ DRM_ERROR("Failed to get CEC clock\n");
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+ return PTR_ERR(vc4_hdmi->cec_clock);
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+ }
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+
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vc4_hdmi->reset = devm_reset_control_get(dev, NULL);
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if (IS_ERR(vc4_hdmi->reset)) {
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DRM_ERROR("Failed to get HDMI reset line\n");
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.h
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
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@@ -154,6 +154,7 @@ struct vc4_hdmi {
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bool cec_tx_ok;
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bool cec_irq_was_rx;
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+ struct clk *cec_clock;
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struct clk *pixel_clock;
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struct clk *hsm_clock;
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struct clk *audio_clock;
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