mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 14:13:16 +00:00
9110126620
Removed upstreamed: generic/pending-5.15/722-net-mt7531-only-do-PLL-once-after-the-reset.patch[1] bcm53xx/patches-5.15/082-v6.0-clk-iproc-Do-not-rely-on-node-name-for-correct-PLL-s.patch[2] All other patches automatically rebased Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 Run-tested: bcm2711/RPi4B, mt7622/RT3200, mvebu/cortexa72 (RB5009UG+S+IN) 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=5de02ab84aeca765da0e4d8e999af35325ac67c2 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.72&id=ab5c5787ab5ecdc4a7ea20b4ef542579e1beb49d Signed-off-by: John Audia <therealgraysky@proton.me>
62 lines
2.0 KiB
Diff
62 lines
2.0 KiB
Diff
From 3e1825e00dafb68eec25df389b63f3ab3d905b59 Mon Sep 17 00:00:00 2001
|
|
From: Gabor Juhos <j4g8y7@gmail.com>
|
|
Date: Fri, 25 Dec 2020 08:02:47 +0100
|
|
Subject: [PATCH] net: phy: define PSGMII PHY interface mode
|
|
|
|
The PSGMII interface is similar to QSGMII. The main difference
|
|
is that the PSGMII interface combines five SGMII lines into a
|
|
single link while in QSGMII only four lines are combined.
|
|
|
|
Similarly to the QSGMII, this interface mode might also needs
|
|
special handling within the MAC driver.
|
|
|
|
Add definitions for the PHY layer to allow to express this type
|
|
of connection between the MAC and PHY.
|
|
|
|
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
|
|
---
|
|
Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
|
|
drivers/net/phy/phylink.c | 1 +
|
|
include/linux/phy.h | 3 +++
|
|
3 files changed, 5 insertions(+)
|
|
|
|
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
|
|
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
|
|
@@ -64,6 +64,7 @@ properties:
|
|
- mii
|
|
- gmii
|
|
- sgmii
|
|
+ - psgmii
|
|
- qsgmii
|
|
- tbi
|
|
- rev-mii
|
|
--- a/drivers/net/phy/phylink.c
|
|
+++ b/drivers/net/phy/phylink.c
|
|
@@ -629,6 +629,7 @@ static int phylink_parse_mode(struct phy
|
|
|
|
switch (pl->link_config.interface) {
|
|
case PHY_INTERFACE_MODE_SGMII:
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
phylink_set(pl->supported, 10baseT_Half);
|
|
phylink_set(pl->supported, 10baseT_Full);
|
|
--- a/include/linux/phy.h
|
|
+++ b/include/linux/phy.h
|
|
@@ -138,6 +138,7 @@ typedef enum {
|
|
PHY_INTERFACE_MODE_XGMII,
|
|
PHY_INTERFACE_MODE_XLGMII,
|
|
PHY_INTERFACE_MODE_MOCA,
|
|
+ PHY_INTERFACE_MODE_PSGMII,
|
|
PHY_INTERFACE_MODE_QSGMII,
|
|
PHY_INTERFACE_MODE_TRGMII,
|
|
PHY_INTERFACE_MODE_100BASEX,
|
|
@@ -243,6 +244,8 @@ static inline const char *phy_modes(phy_
|
|
return "xlgmii";
|
|
case PHY_INTERFACE_MODE_MOCA:
|
|
return "moca";
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
+ return "psgmii";
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
return "qsgmii";
|
|
case PHY_INTERFACE_MODE_TRGMII:
|