mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-22 23:12:32 +00:00
99c9d8abd6
Changelog: https://cdn.kernel.org/pub/linux/kernel/v5.x/ChangeLog-5.15.148 Removed upstreamed: generic/hack-5.15/321-powerpc_crtsavres_prereq.patch[1] Manually rebased: target/linux/octeontx/patches-5.15/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.148&id=0b11a145eb00d51f7ef18cfcae587b93f9adb1e9 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit?h=v5.15.148&id=b67064bd372300a75293efbbc70624996dccffd4 Build system: x86_64 Build-tested: ramips/tplink_archer-a6-v3 Run-tested: ramips/tplink_archer-a6-v3 Signed-off-by: John Audia <therealgraysky@proton.me>
83 lines
2.3 KiB
Diff
83 lines
2.3 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
|
|
Date: Fri, 4 Sep 2020 18:42:42 +0200
|
|
Subject: [PATCH] pci: pcie-mediatek: add support for coherent DMA
|
|
|
|
It improves performance by eliminating the need for a cache flush for DMA on
|
|
attached devices
|
|
|
|
Signed-off-by: Felix Fietkau <nbd@nbd.name>
|
|
---
|
|
|
|
--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
|
+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
|
|
@@ -837,6 +837,9 @@
|
|
bus-range = <0x00 0xff>;
|
|
ranges = <0x82000000 0 0x20000000 0x0 0x20000000 0 0x8000000>;
|
|
status = "disabled";
|
|
+ dma-coherent;
|
|
+ mediatek,hifsys = <&hifsys>;
|
|
+ mediatek,cci-control = <&cci_control2>;
|
|
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 7>;
|
|
@@ -881,6 +884,9 @@
|
|
bus-range = <0x00 0xff>;
|
|
ranges = <0x82000000 0 0x28000000 0x0 0x28000000 0 0x8000000>;
|
|
status = "disabled";
|
|
+ dma-coherent;
|
|
+ mediatek,hifsys = <&hifsys>;
|
|
+ mediatek,cci-control = <&cci_control2>;
|
|
|
|
#interrupt-cells = <1>;
|
|
interrupt-map-mask = <0 0 0 7>;
|
|
--- a/drivers/pci/controller/pcie-mediatek.c
|
|
+++ b/drivers/pci/controller/pcie-mediatek.c
|
|
@@ -20,6 +20,7 @@
|
|
#include <linux/of_address.h>
|
|
#include <linux/of_pci.h>
|
|
#include <linux/of_platform.h>
|
|
+#include <linux/of_address.h>
|
|
#include <linux/pci.h>
|
|
#include <linux/phy/phy.h>
|
|
#include <linux/platform_device.h>
|
|
@@ -139,6 +140,11 @@
|
|
#define PCIE_LINK_STATUS_V2 0x804
|
|
#define PCIE_PORT_LINKUP_V2 BIT(10)
|
|
|
|
+/* DMA channel mapping */
|
|
+#define HIFSYS_DMA_AG_MAP 0x008
|
|
+#define HIFSYS_DMA_AG_MAP_PCIE0 BIT(0)
|
|
+#define HIFSYS_DMA_AG_MAP_PCIE1 BIT(1)
|
|
+
|
|
struct mtk_pcie_port;
|
|
|
|
/**
|
|
@@ -1060,6 +1066,27 @@ static int mtk_pcie_setup(struct mtk_pci
|
|
struct mtk_pcie_port *port, *tmp;
|
|
int err, slot;
|
|
|
|
+ if (of_dma_is_coherent(node)) {
|
|
+ struct regmap *con;
|
|
+ u32 mask;
|
|
+
|
|
+ con = syscon_regmap_lookup_by_phandle(node,
|
|
+ "mediatek,cci-control");
|
|
+ /* enable CPU/bus coherency */
|
|
+ if (!IS_ERR(con))
|
|
+ regmap_write(con, 0, 3);
|
|
+
|
|
+ con = syscon_regmap_lookup_by_phandle(node,
|
|
+ "mediatek,hifsys");
|
|
+ if (IS_ERR(con)) {
|
|
+ dev_err(dev, "missing hifsys node\n");
|
|
+ return PTR_ERR(con);
|
|
+ }
|
|
+
|
|
+ mask = HIFSYS_DMA_AG_MAP_PCIE0 | HIFSYS_DMA_AG_MAP_PCIE1;
|
|
+ regmap_update_bits(con, HIFSYS_DMA_AG_MAP, mask, mask);
|
|
+ }
|
|
+
|
|
slot = of_get_pci_domain_nr(dev->of_node);
|
|
if (slot < 0) {
|
|
for_each_available_child_of_node(node, child) {
|