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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
90 lines
2.7 KiB
Diff
90 lines
2.7 KiB
Diff
From 66f4bb358787f4f52de0614a92f9e4130d1e0e01 Mon Sep 17 00:00:00 2001
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From: Vladimir Oltean <vladimir.oltean@nxp.com>
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Date: Sat, 9 Nov 2019 15:02:56 +0200
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Subject: [PATCH] net: mscc: ocelot: move port initialization into separate
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function
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We need a function for the DSA front-end that does none of the
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net_device registration, but initializes the hardware ports.
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/ethernet/mscc/ocelot.c | 45 ++++++++++++++++++++------------------
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1 file changed, 24 insertions(+), 21 deletions(-)
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--- a/drivers/net/ethernet/mscc/ocelot.c
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+++ b/drivers/net/ethernet/mscc/ocelot.c
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@@ -2132,6 +2132,28 @@ static int ocelot_init_timestamp(struct
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return 0;
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}
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+static void ocelot_init_port(struct ocelot *ocelot, int port)
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+{
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+ struct ocelot_port *ocelot_port = ocelot->ports[port];
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+
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+ INIT_LIST_HEAD(&ocelot_port->skbs);
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+
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+ /* Basic L2 initialization */
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+
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+ /* Drop frames with multicast source address */
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+ ocelot_rmw_gix(ocelot, ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
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+ ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA,
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+ ANA_PORT_DROP_CFG, port);
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+
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+ /* Set default VLAN and tag type to 8021Q. */
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+ ocelot_rmw_gix(ocelot, REW_PORT_VLAN_CFG_PORT_TPID(ETH_P_8021Q),
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+ REW_PORT_VLAN_CFG_PORT_TPID_M,
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+ REW_PORT_VLAN_CFG, port);
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+
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+ /* Enable vcap lookups */
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+ ocelot_vcap_enable(ocelot, port);
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+}
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+
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int ocelot_probe_port(struct ocelot *ocelot, u8 port,
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void __iomem *regs,
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struct phy_device *phy)
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@@ -2139,7 +2161,6 @@ int ocelot_probe_port(struct ocelot *oce
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struct ocelot_port_private *priv;
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struct ocelot_port *ocelot_port;
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struct net_device *dev;
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- u32 val;
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int err;
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dev = alloc_etherdev(sizeof(struct ocelot_port_private));
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@@ -2167,32 +2188,14 @@ int ocelot_probe_port(struct ocelot *oce
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ocelot_mact_learn(ocelot, PGID_CPU, dev->dev_addr, ocelot_port->pvid,
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ENTRYTYPE_LOCKED);
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- INIT_LIST_HEAD(&ocelot_port->skbs);
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+ ocelot_init_port(ocelot, port);
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err = register_netdev(dev);
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if (err) {
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dev_err(ocelot->dev, "register_netdev failed\n");
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- goto err_register_netdev;
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+ free_netdev(dev);
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}
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- /* Basic L2 initialization */
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-
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- /* Drop frames with multicast source address */
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- val = ANA_PORT_DROP_CFG_DROP_MC_SMAC_ENA;
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- ocelot_rmw_gix(ocelot, val, val, ANA_PORT_DROP_CFG, port);
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-
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- /* Set default VLAN and tag type to 8021Q. */
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- ocelot_rmw_gix(ocelot, REW_PORT_VLAN_CFG_PORT_TPID(ETH_P_8021Q),
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- REW_PORT_VLAN_CFG_PORT_TPID_M,
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- REW_PORT_VLAN_CFG, port);
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-
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- /* Enable vcap lookups */
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- ocelot_vcap_enable(ocelot, port);
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-
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- return 0;
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-
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-err_register_netdev:
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- free_netdev(dev);
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return err;
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}
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EXPORT_SYMBOL(ocelot_probe_port);
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