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cd1e9c88f3
Backport A64 unstable timer patches from linux 5.1 Signed-off-by: Oskari Lemmela <oskari@lemmela.net> [Split the single patch into the two original patches] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
119 lines
4.3 KiB
Diff
119 lines
4.3 KiB
Diff
From f2e600c149fda3453344f89c7e9353fe278ebd32 Mon Sep 17 00:00:00 2001
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From: Christoffer Dall <christoffer.dall@linaro.org>
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Date: Wed, 18 Oct 2017 13:06:25 +0200
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Subject: [PATCH] arm64: Implement arch_counter_get_cntpct to read the physical
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counter
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As we are about to use the physical counter on arm64 systems that have
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KVM support, implement arch_counter_get_cntpct() and the associated
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errata workaround functionality for stable timer reads.
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Cc: Will Deacon <will.deacon@arm.com>
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Cc: Mark Rutland <mark.rutland@arm.com>
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Acked-by: Catalin Marinas <catalin.marinas@arm.com>
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Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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---
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arch/arm64/include/asm/arch_timer.h | 8 +++-----
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drivers/clocksource/arm_arch_timer.c | 23 +++++++++++++++++++++++
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2 files changed, 26 insertions(+), 5 deletions(-)
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--- a/arch/arm64/include/asm/arch_timer.h
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+++ b/arch/arm64/include/asm/arch_timer.h
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@@ -52,6 +52,7 @@ struct arch_timer_erratum_workaround {
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const char *desc;
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u32 (*read_cntp_tval_el0)(void);
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u32 (*read_cntv_tval_el0)(void);
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+ u64 (*read_cntpct_el0)(void);
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u64 (*read_cntvct_el0)(void);
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int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
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int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
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@@ -148,11 +149,8 @@ static inline void arch_timer_set_cntkct
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static inline u64 arch_counter_get_cntpct(void)
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{
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- /*
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- * AArch64 kernel and user space mandate the use of CNTVCT.
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- */
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- BUG();
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- return 0;
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+ isb();
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+ return arch_timer_reg_read_stable(cntpct_el0);
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}
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static inline u64 arch_counter_get_cntvct(void)
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--- a/drivers/clocksource/arm_arch_timer.c
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+++ b/drivers/clocksource/arm_arch_timer.c
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@@ -217,6 +217,11 @@ static u32 notrace fsl_a008585_read_cntv
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return __fsl_a008585_read_reg(cntv_tval_el0);
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}
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+static u64 notrace fsl_a008585_read_cntpct_el0(void)
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+{
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+ return __fsl_a008585_read_reg(cntpct_el0);
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+}
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+
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static u64 notrace fsl_a008585_read_cntvct_el0(void)
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{
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return __fsl_a008585_read_reg(cntvct_el0);
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@@ -258,6 +263,11 @@ static u32 notrace hisi_161010101_read_c
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return __hisi_161010101_read_reg(cntv_tval_el0);
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}
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+static u64 notrace hisi_161010101_read_cntpct_el0(void)
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+{
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+ return __hisi_161010101_read_reg(cntpct_el0);
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+}
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+
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static u64 notrace hisi_161010101_read_cntvct_el0(void)
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{
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return __hisi_161010101_read_reg(cntvct_el0);
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@@ -288,6 +298,15 @@ static struct ate_acpi_oem_info hisi_161
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#endif
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#ifdef CONFIG_ARM64_ERRATUM_858921
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+static u64 notrace arm64_858921_read_cntpct_el0(void)
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+{
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+ u64 old, new;
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+
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+ old = read_sysreg(cntpct_el0);
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+ new = read_sysreg(cntpct_el0);
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+ return (((old ^ new) >> 32) & 1) ? old : new;
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+}
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+
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static u64 notrace arm64_858921_read_cntvct_el0(void)
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{
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u64 old, new;
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@@ -346,6 +365,7 @@ static const struct arch_timer_erratum_w
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.desc = "Freescale erratum a005858",
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.read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0,
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.read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0,
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+ .read_cntpct_el0 = fsl_a008585_read_cntpct_el0,
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.read_cntvct_el0 = fsl_a008585_read_cntvct_el0,
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.set_next_event_phys = erratum_set_next_event_tval_phys,
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.set_next_event_virt = erratum_set_next_event_tval_virt,
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@@ -358,6 +378,7 @@ static const struct arch_timer_erratum_w
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.desc = "HiSilicon erratum 161010101",
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.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
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.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
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+ .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
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.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
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.set_next_event_phys = erratum_set_next_event_tval_phys,
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.set_next_event_virt = erratum_set_next_event_tval_virt,
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@@ -368,6 +389,7 @@ static const struct arch_timer_erratum_w
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.desc = "HiSilicon erratum 161010101",
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.read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0,
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.read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0,
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+ .read_cntpct_el0 = hisi_161010101_read_cntpct_el0,
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.read_cntvct_el0 = hisi_161010101_read_cntvct_el0,
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.set_next_event_phys = erratum_set_next_event_tval_phys,
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.set_next_event_virt = erratum_set_next_event_tval_virt,
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@@ -378,6 +400,7 @@ static const struct arch_timer_erratum_w
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.match_type = ate_match_local_cap_id,
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.id = (void *)ARM64_WORKAROUND_858921,
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.desc = "ARM erratum 858921",
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+ .read_cntpct_el0 = arm64_858921_read_cntpct_el0,
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.read_cntvct_el0 = arm64_858921_read_cntvct_el0,
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},
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#endif
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