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APRESIA ApresiaLightGS120GT-SS (APLGS120GTSS) is a 16 + 4 ports gigabit switch, based on RTL8382M. Specifications: - SoC : Realtek RTL8382M - RAM : DDR3 256 MiB (Nanya NT5CC256M8JQ-EK) - Flash : SPI-NOR 32 MiB (Macronix MX25L25635FMI-10G) - Ethernet : 10/100/1000 Mbps x16 + 4 - port 1-8 : RTL8218B - port 9-16 : RTL8382M, TP (SoC, RTL8218B) - port 17-20 : RTL8214FC, TP/SFP (Combo) - LEDs/Keys : 3x/1x - UART : through-hole on PCB - J6: 3.3V, TX, RX, GND from tri-angle marking side - 115200n8 - Power : 100-120/200-240 VAC, 50/60 Hz Max. 16 W, Avg 14 W (100 VAC) - Plug : IEC 60320-C13 Flash instruction using factory image: 1. Boot ApresiaLightGS120GT-SS normally 2. Login to WebUI and open firmware page ("ファームウェア") 3. If the device is booted from image1, set active image for next booting ("起動イメージ選択") to image2("イメージ2"), press apply ("適用") button and reboot the device to make booting from image2 4. On the WebUI, set active image to image1 5. Select the OpenWrt factory image and press update button ("更新") 6. Open reboot page ("再起動") and press reboot button ("再起動実行") Notes: - "ApresiaLightGS120GT-SS" is a model name and "APLGS120GTSS" is a model number - this device has 3x GPIO-controlled LEDs on PCB, but 1x LED ("green:unused") has no hole on the case Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
271 lines
5.3 KiB
Plaintext
271 lines
5.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "apresia,aplgs120gtss", "realtek,rtl8382-soc";
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model = "APRESIA ApresiaLightGS120GT-SS";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x10000000>;
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};
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leds {
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compatible = "gpio-leds";
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led_power: led-0 {
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label = "green:pwr";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_POWER;
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};
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led-1 {
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label = "red:loop";
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gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_FAULT;
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};
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/* LED chip is soldered, but no hole on the case */
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led-2 {
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label = "green:unused";
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gpios = <&gpio1 36 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_GREEN>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio1 33 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio-restart {
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compatible = "gpio-restart";
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gpios = <&gpio1 34 GPIO_ACTIVE_LOW>;
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open-source;
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};
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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indirect-access-bus-id = <0>;
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};
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i2c0: i2c-gpio-0 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c-gpio-1 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c2: i2c-gpio-2 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c3: i2c-gpio-3 {
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compatible = "i2c-gpio";
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sda-gpios = <&gpio1 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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scl-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <2>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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/* 4x TX-Disable lines are provided by RTL8214FC */
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sfp0: sfp-p17 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c1>;
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los-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
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};
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sfp1: sfp-p18 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c0>;
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los-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
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};
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sfp2: sfp-p19 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c3>;
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los-gpio = <&gpio1 25 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 24 GPIO_ACTIVE_LOW>;
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};
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sfp3: sfp-p20 {
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compatible = "sff,sfp";
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i2c-bus = <&i2c2>;
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los-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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mod-def0-gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
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};
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};
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&gpio0 {
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rtl8231_reset {
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gpio-hog;
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gpios = <1 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "rtl8231-reset";
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x40000>;
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};
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partition@c0000 {
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label = "u-boot-env2";
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reg = <0xc0000 0x40000>;
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};
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partition@100000 {
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compatible = "openwrt,uimage", "denx,uimage";
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label = "firmware";
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reg = <0x100000 0xe80000>;
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openwrt,ih-magic = <0x12345000>;
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};
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partition@f80000 {
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label = "firmware2";
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reg = <0xf80000 0xe80000>;
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};
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partition@1e00000 {
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label = "jffs2";
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reg = <0x1e00000 0x200000>;
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read-only;
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};
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};
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};
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};
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ðernet0 {
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mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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EXTERNAL_SFP_PHY_FULL(24, 0)
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EXTERNAL_SFP_PHY_FULL(25, 1)
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EXTERNAL_SFP_PHY_FULL(26, 2)
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EXTERNAL_SFP_PHY_FULL(27, 3)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(0, 1, qsgmii)
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SWITCH_PORT(1, 2, qsgmii)
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SWITCH_PORT(2, 3, qsgmii)
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SWITCH_PORT(3, 4, qsgmii)
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SWITCH_PORT(4, 5, qsgmii)
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SWITCH_PORT(5, 6, qsgmii)
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SWITCH_PORT(6, 7, qsgmii)
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SWITCH_PORT(7, 8, qsgmii)
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SWITCH_PORT(8, 9, internal)
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SWITCH_PORT(9, 10, internal)
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SWITCH_PORT(10, 11, internal)
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SWITCH_PORT(11, 12, internal)
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SWITCH_PORT(12, 13, internal)
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SWITCH_PORT(13, 14, internal)
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SWITCH_PORT(14, 15, internal)
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SWITCH_PORT(15, 16, internal)
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SWITCH_PORT(24, 17, qsgmii)
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SWITCH_PORT(25, 18, qsgmii)
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SWITCH_PORT(26, 19, qsgmii)
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SWITCH_PORT(27, 20, qsgmii)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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