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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
56 lines
2.1 KiB
Diff
56 lines
2.1 KiB
Diff
From cf7d5f766e0a9eeb09271c36f546ac0a1fdc0444 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Fri, 24 Jan 2020 14:22:06 +0000
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Subject: [PATCH] drm/fourcc: Add packed 10bit YUV 4:2:0 format
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Adds a format that is 3 10bit YUV 4:2:0 samples packed into
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a 32bit work (with 2 spare bits).
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Supported on Broadcom BCM2711 chips.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/drm_fourcc.c | 3 +++
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include/uapi/drm/drm_fourcc.h | 11 +++++++++++
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2 files changed, 14 insertions(+)
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--- a/drivers/gpu/drm/drm_fourcc.c
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+++ b/drivers/gpu/drm/drm_fourcc.c
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@@ -266,6 +266,9 @@ const struct drm_format_info *__drm_form
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.num_planes = 3, .char_per_block = { 2, 2, 2 },
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.block_w = { 1, 1, 1 }, .block_h = { 1, 1, 1 }, .hsub = 0,
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.vsub = 0, .is_yuv = true },
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+ { .format = DRM_FORMAT_P030, .depth = 0, .num_planes = 2,
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+ .char_per_block = { 4, 4, 0 }, .block_w = { 3, 0, 0 }, .block_h = { 1, 0, 0 },
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+ .hsub = 2, .vsub = 2, .is_yuv = true},
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};
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unsigned int i;
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--- a/include/uapi/drm/drm_fourcc.h
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+++ b/include/uapi/drm/drm_fourcc.h
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@@ -325,6 +325,13 @@ extern "C" {
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#define DRM_FORMAT_Q401 fourcc_code('Q', '4', '0', '1')
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/*
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+ * 2 plane YCbCr MSB aligned, 3 pixels packed into 4 bytes.
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+ * index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
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+ * index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
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+ */
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+#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */
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+
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+/*
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* 3 plane YCbCr
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* index 0: Y plane, [7:0] Y
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* index 1: Cb plane, [7:0] Cb
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@@ -842,6 +849,10 @@ drm_fourcc_canonicalize_nvidia_format_mo
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* and UV. Some SAND-using hardware stores UV in a separate tiled
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* image from Y to reduce the column height, which is not supported
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* with these modifiers.
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+ *
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+ * The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also
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+ * supported for DRM_FORMAT_P030 where the columns remain as 128 bytes
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+ * wide, but as this is a 10 bpp format that translates to 96 pixels.
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*/
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#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
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