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cda3dc3ae1
SVN-Revision: 9513
417 lines
10 KiB
C
417 lines
10 KiB
C
/*
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* OHCI HCD (Host Controller Driver) for USB.
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*
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* (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
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* (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
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*
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* This file is licenced under GPL
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*/
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/*-------------------------------------------------------------------------*/
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/*
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* OHCI Root Hub ... the nonsharable stuff
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*/
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#define dbg_port(hc,label,num,value) \
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admhc_dbg(hc, \
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"%s port%d " \
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"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
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label, num, temp, \
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(temp & ADMHC_PS_PRSC) ? " PRSC" : "", \
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(temp & ADMHC_PS_OCIC) ? " OCIC" : "", \
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(temp & ADMHC_PS_PSSC) ? " PSSC" : "", \
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(temp & ADMHC_PS_PESC) ? " PESC" : "", \
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(temp & ADMHC_PS_CSC) ? " CSC" : "", \
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\
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(temp & ADMHC_PS_LSDA) ? " LSDA" : "", \
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(temp & ADMHC_PS_PPS) ? " PPS" : "", \
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(temp & ADMHC_PS_PRS) ? " PRS" : "", \
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(temp & ADMHC_PS_POCI) ? " POCI" : "", \
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(temp & ADMHC_PS_PSS) ? " PSS" : "", \
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\
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(temp & ADMHC_PS_PES) ? " PES" : "", \
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(temp & ADMHC_PS_CCS) ? " CCS" : "" \
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);
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#define dbg_port_write(hc,label,num,value) \
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admhc_dbg(hc, \
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"%s port%d " \
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"= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
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label, num, temp, \
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(temp & ADMHC_PS_PRSC) ? " PRSC" : "", \
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(temp & ADMHC_PS_OCIC) ? " OCIC" : "", \
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(temp & ADMHC_PS_PSSC) ? " PSSC" : "", \
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(temp & ADMHC_PS_PESC) ? " PESC" : "", \
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(temp & ADMHC_PS_CSC) ? " CSC" : "", \
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\
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(temp & ADMHC_PS_CPP) ? " CPP" : "", \
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(temp & ADMHC_PS_SPP) ? " SPP" : "", \
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(temp & ADMHC_PS_SPR) ? " SPR" : "", \
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(temp & ADMHC_PS_CPS) ? " CPS" : "", \
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(temp & ADMHC_PS_SPS) ? " SPS" : "", \
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\
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(temp & ADMHC_PS_SPE) ? " SPE" : "", \
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(temp & ADMHC_PS_CPE) ? " CPE" : "" \
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);
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/*-------------------------------------------------------------------------*/
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/* hcd->hub_irq_enable() */
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static void admhc_hub_irq_enable(struct usb_hcd *hcd)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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spin_lock_irq(&ahcd->lock);
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if (!ahcd->autostop)
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del_timer(&hcd->rh_timer); /* Prevent next poll */
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admhc_intr_enable(ahcd, ADMHC_INTR_INSM);
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spin_unlock_irq(&ahcd->lock);
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}
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/*-------------------------------------------------------------------------*/
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/* build "status change" packet (one or two bytes) from HC registers */
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static int
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admhc_hub_status_data(struct usb_hcd *hcd, char *buf)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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int i, changed = 0, length = 1;
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int any_connected = 0;
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unsigned long flags;
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u32 status;
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spin_lock_irqsave(&ahcd->lock, flags);
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if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
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goto done;
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/* init status */
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status = admhc_get_rhdesc(ahcd);
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if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC))
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buf [0] = changed = 1;
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else
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buf [0] = 0;
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if (ahcd->num_ports > 7) {
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buf [1] = 0;
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length++;
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}
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/* look at each port */
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for (i = 0; i < ahcd->num_ports; i++) {
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status = admhc_get_portstatus(ahcd, i);
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/* can't autostop if ports are connected */
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any_connected |= (status & ADMHC_PS_CCS);
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if (status & (ADMHC_PS_CSC | ADMHC_PS_PESC | ADMHC_PS_PSSC
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| ADMHC_PS_OCIC | ADMHC_PS_PRSC)) {
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changed = 1;
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if (i < 7)
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buf [0] |= 1 << (i + 1);
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else
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buf [1] |= 1 << (i - 7);
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}
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}
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hcd->poll_rh = admhc_root_hub_state_changes(ahcd, changed,
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any_connected);
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done:
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spin_unlock_irqrestore(&ahcd->lock, flags);
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return changed ? length : 0;
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}
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/*-------------------------------------------------------------------------*/
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static void admhc_hub_descriptor(struct admhcd *ahcd,
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struct usb_hub_descriptor *desc)
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{
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u32 rh = admhc_get_rhdesc(ahcd);
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u16 temp;
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desc->bDescriptorType = USB_DT_HUB; /* Hub-descriptor */
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desc->bPwrOn2PwrGood = ADMHC_POTPGT/2; /* use default value */
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desc->bHubContrCurrent = 0x00; /* 0mA */
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desc->bNbrPorts = ahcd->num_ports;
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temp = 1 + (ahcd->num_ports / 8);
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desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
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/* FIXME */
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temp = 0;
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if (rh & ADMHC_RH_NPS) /* no power switching? */
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temp |= 0x0002;
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if (rh & ADMHC_RH_PSM) /* per-port power switching? */
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temp |= 0x0001;
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if (rh & ADMHC_RH_NOCP) /* no overcurrent reporting? */
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temp |= 0x0010;
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else if (rh & ADMHC_RH_OCPM) /* per-port overcurrent reporting? */
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temp |= 0x0008;
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desc->wHubCharacteristics = (__force __u16)cpu_to_hc16(ahcd, temp);
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/* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
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desc->bitmap [0] = 0;
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desc->bitmap [0] = ~0;
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}
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/*-------------------------------------------------------------------------*/
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#ifdef CONFIG_USB_OTG
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static int admhc_start_port_reset(struct usb_hcd *hcd, unsigned port)
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{
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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u32 status;
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if (!port)
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return -EINVAL;
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port--;
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/* start port reset before HNP protocol times out */
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status = admhc_readl(ahcd, &ahcd->regs->portstatus[port]);
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if (!(status & ADMHC_PS_CCS))
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return -ENODEV;
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/* khubd will finish the reset later */
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admhc_writel(ahcd, ADMHC_PS_PRS, &ahcd->regs->portstatus[port]);
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return 0;
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}
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static void start_hnp(struct admhcd *ahcd);
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#else
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#define admhc_start_port_reset NULL
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#endif
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/*-------------------------------------------------------------------------*/
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/* See usb 7.1.7.5: root hubs must issue at least 50 msec reset signaling,
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* not necessarily continuous ... to guard against resume signaling.
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* The short timeout is safe for non-root hubs, and is backward-compatible
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* with earlier Linux hosts.
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*/
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#ifdef CONFIG_USB_SUSPEND
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#define PORT_RESET_MSEC 50
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#else
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#define PORT_RESET_MSEC 10
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#endif
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/* this timer value might be vendor-specific ... */
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#define PORT_RESET_HW_MSEC 10
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/* wrap-aware logic morphed from <linux/jiffies.h> */
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#define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0)
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/* called from some task, normally khubd */
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static inline int root_port_reset(struct admhcd *ahcd, unsigned port)
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{
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#if 0
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/* FIXME: revert to this when frame numbers are updated */
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__hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
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u32 temp;
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u16 now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
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u16 reset_done = now + PORT_RESET_MSEC;
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/* build a "continuous enough" reset signal, with up to
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* 3msec gap between pulses. scheduler HZ==100 must work;
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* this might need to be deadline-scheduled.
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*/
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do {
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/* spin until any current reset finishes */
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for (;;) {
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temp = admhc_readl(ahcd, portstat);
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/* handle e.g. CardBus eject */
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if (temp == ~(u32)0)
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return -ESHUTDOWN;
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if (!(temp & ADMHC_PS_PRS))
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break;
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udelay (500);
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}
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if (!(temp & ADMHC_PS_CCS))
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break;
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if (temp & ADMHC_PS_PRSC)
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admhc_writel(ahcd, ADMHC_PS_PRSC, portstat);
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/* start the next reset, sleep till it's probably done */
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admhc_writel(ahcd, ADMHC_PS_PRS, portstat);
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msleep(PORT_RESET_HW_MSEC);
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now = admhc_readl(ahcd, &ahcd->regs->fmnumber);
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} while (tick_before(now, reset_done));
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/* caller synchronizes using PRSC */
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#else
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__hc32 __iomem *portstat = &ahcd->regs->portstatus[port];
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u32 temp;
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unsigned long reset_done = jiffies + msecs_to_jiffies(PORT_RESET_MSEC);
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/* build a "continuous enough" reset signal, with up to
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* 3msec gap between pulses. scheduler HZ==100 must work;
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* this might need to be deadline-scheduled.
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*/
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do {
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/* spin until any current reset finishes */
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for (;;) {
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temp = admhc_readl(ahcd, portstat);
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/* handle e.g. CardBus eject */
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if (temp == ~(u32)0)
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return -ESHUTDOWN;
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if (!(temp & ADMHC_PS_PRS))
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break;
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udelay (500);
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}
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if (!(temp & ADMHC_PS_CCS))
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break;
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if (temp & ADMHC_PS_PRSC)
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admhc_writel(ahcd, ADMHC_PS_PRSC, portstat);
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/* start the next reset, sleep till it's probably done */
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admhc_writel(ahcd, ADMHC_PS_PRS, portstat);
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msleep(PORT_RESET_HW_MSEC);
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} while (time_before(jiffies, reset_done));
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admhc_writel(ahcd, ADMHC_PS_SPE | ADMHC_PS_CSC, portstat);
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msleep(100);
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#endif
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return 0;
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}
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static int admhc_hub_control (
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struct usb_hcd *hcd,
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u16 typeReq,
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u16 wValue,
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u16 wIndex,
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char *buf,
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u16 wLength
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) {
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struct admhcd *ahcd = hcd_to_admhcd(hcd);
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int ports = hcd_to_bus (hcd)->root_hub->maxchild;
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u32 temp;
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int ret = 0;
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if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
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return -ESHUTDOWN;
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switch (typeReq) {
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case ClearHubFeature:
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switch (wValue) {
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case C_HUB_OVER_CURRENT:
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#if 0 /* FIXME */
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admhc_writel(ahcd, ADMHC_RH_OCIC,
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&ahcd->regs->roothub.status);
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#endif
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case C_HUB_LOCAL_POWER:
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break;
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default:
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goto error;
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}
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break;
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case ClearPortFeature:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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switch (wValue) {
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case USB_PORT_FEAT_ENABLE:
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temp = ADMHC_PS_CPE;
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break;
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case USB_PORT_FEAT_SUSPEND:
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temp = ADMHC_PS_CPS;
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break;
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case USB_PORT_FEAT_POWER:
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temp = ADMHC_PS_CPP;
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break;
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case USB_PORT_FEAT_C_CONNECTION:
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temp = ADMHC_PS_CSC;
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break;
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case USB_PORT_FEAT_C_ENABLE:
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temp = ADMHC_PS_PESC;
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break;
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case USB_PORT_FEAT_C_SUSPEND:
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temp = ADMHC_PS_PSSC;
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break;
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case USB_PORT_FEAT_C_OVER_CURRENT:
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temp = ADMHC_PS_OCIC;
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break;
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case USB_PORT_FEAT_C_RESET:
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temp = ADMHC_PS_PRSC;
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break;
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default:
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goto error;
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}
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admhc_writel(ahcd, temp, &ahcd->regs->portstatus[wIndex]);
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break;
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case GetHubDescriptor:
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admhc_hub_descriptor(ahcd, (struct usb_hub_descriptor *) buf);
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break;
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case GetHubStatus:
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temp = admhc_get_rhdesc(ahcd);
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temp &= ~(ADMHC_RH_CRWE | ADMHC_RH_DRWE);
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put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
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break;
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case GetPortStatus:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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temp = admhc_get_portstatus(ahcd, wIndex);
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put_unaligned(cpu_to_le32 (temp), (__le32 *) buf);
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dbg_port(ahcd, "GetPortStatus", wIndex, temp);
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break;
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case SetHubFeature:
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switch (wValue) {
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case C_HUB_OVER_CURRENT:
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// FIXME: this can be cleared, yes?
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case C_HUB_LOCAL_POWER:
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break;
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default:
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goto error;
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}
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break;
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case SetPortFeature:
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if (!wIndex || wIndex > ports)
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goto error;
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wIndex--;
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switch (wValue) {
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case USB_PORT_FEAT_ENABLE:
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admhc_writel(ahcd, ADMHC_PS_SPE,
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&ahcd->regs->portstatus[wIndex]);
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break;
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case USB_PORT_FEAT_SUSPEND:
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#ifdef CONFIG_USB_OTG
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if (hcd->self.otg_port == (wIndex + 1)
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&& hcd->self.b_hnp_enable)
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start_hnp(ahcd);
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else
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#endif
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admhc_writel(ahcd, ADMHC_PS_SPS,
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&ahcd->regs->portstatus[wIndex]);
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break;
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case USB_PORT_FEAT_POWER:
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admhc_writel(ahcd, ADMHC_PS_SPP,
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&ahcd->regs->portstatus[wIndex]);
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break;
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case USB_PORT_FEAT_RESET:
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ret = root_port_reset(ahcd, wIndex);
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break;
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default:
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goto error;
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}
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break;
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default:
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error:
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/* "protocol stall" on error */
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ret = -EPIPE;
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}
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return ret;
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}
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