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3a2668c6d5
Refreshed all patches. Remove upstreamed: - 272-uapi-if_ether.h-prevent-redefinition-of-struct-ethhd.patch Remove upstreamed hunks: - 080-pinctrl-msm-fix-gpio-hog-related-boot-issues.patch Fixes: - CVE-2018-1000026 Compile-tested on: ar71xx, cns3xxx, imx6, x86_64 Runtime-tested on: ar71xx, cns3xxx, imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
100 lines
3.4 KiB
Diff
100 lines
3.4 KiB
Diff
From a45a0eb188581a6c1f57b7adc4f66f5754927ad3 Mon Sep 17 00:00:00 2001
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From: Dan Pasanen <dan.pasanen@gmail.com>
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Date: Thu, 21 Sep 2017 09:55:42 -0500
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Subject: [PATCH 001/454] arm: partially revert
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702b94bff3c50542a6e4ab9a4f4cef093262fe65
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* Re-expose some dmi APIs for use in VCSM
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---
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arch/arm/include/asm/cacheflush.h | 21 +++++++++++++++++++++
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arch/arm/include/asm/glue-cache.h | 2 ++
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arch/arm/mm/proc-macros.S | 2 ++
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arch/arm/mm/proc-syms.c | 3 +++
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4 files changed, 28 insertions(+)
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--- a/arch/arm/include/asm/cacheflush.h
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+++ b/arch/arm/include/asm/cacheflush.h
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@@ -94,6 +94,21 @@
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* DMA Cache Coherency
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* ===================
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*
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+ * dma_inv_range(start, end)
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+ *
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+ * Invalidate (discard) the specified virtual address range.
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+ * May not write back any entries. If 'start' or 'end'
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+ * are not cache line aligned, those lines must be written
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+ * back.
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+ * - start - virtual start address
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+ * - end - virtual end address
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+ *
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+ * dma_clean_range(start, end)
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+ *
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+ * Clean (write back) the specified virtual address range.
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+ * - start - virtual start address
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+ * - end - virtual end address
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+ *
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* dma_flush_range(start, end)
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*
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* Clean and invalidate the specified virtual address range.
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@@ -115,6 +130,8 @@ struct cpu_cache_fns {
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void (*dma_map_area)(const void *, size_t, int);
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void (*dma_unmap_area)(const void *, size_t, int);
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+ void (*dma_inv_range)(const void *, const void *);
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+ void (*dma_clean_range)(const void *, const void *);
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void (*dma_flush_range)(const void *, const void *);
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} __no_randomize_layout;
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@@ -140,6 +157,8 @@ extern struct cpu_cache_fns cpu_cache;
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* is visible to DMA, or data written by DMA to system memory is
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* visible to the CPU.
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*/
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+#define dmac_inv_range cpu_cache.dma_inv_range
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+#define dmac_clean_range cpu_cache.dma_clean_range
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#define dmac_flush_range cpu_cache.dma_flush_range
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#else
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@@ -159,6 +178,8 @@ extern void __cpuc_flush_dcache_area(voi
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* is visible to DMA, or data written by DMA to system memory is
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* visible to the CPU.
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*/
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+extern void dmac_inv_range(const void *, const void *);
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+extern void dmac_clean_range(const void *, const void *);
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extern void dmac_flush_range(const void *, const void *);
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#endif
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--- a/arch/arm/include/asm/glue-cache.h
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+++ b/arch/arm/include/asm/glue-cache.h
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@@ -154,6 +154,8 @@ static inline void nop_dma_unmap_area(co
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#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range)
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#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
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+#define dmac_inv_range __glue(_CACHE,_dma_inv_range)
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+#define dmac_clean_range __glue(_CACHE,_dma_clean_range)
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#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
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#endif
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--- a/arch/arm/mm/proc-macros.S
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+++ b/arch/arm/mm/proc-macros.S
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@@ -335,6 +335,8 @@ ENTRY(\name\()_cache_fns)
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.long \name\()_flush_kern_dcache_area
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.long \name\()_dma_map_area
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.long \name\()_dma_unmap_area
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+ .long \name\()_dma_inv_range
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+ .long \name\()_dma_clean_range
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.long \name\()_dma_flush_range
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.size \name\()_cache_fns, . - \name\()_cache_fns
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.endm
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--- a/arch/arm/mm/proc-syms.c
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+++ b/arch/arm/mm/proc-syms.c
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@@ -30,6 +30,9 @@ EXPORT_SYMBOL(__cpuc_flush_user_all);
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EXPORT_SYMBOL(__cpuc_flush_user_range);
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EXPORT_SYMBOL(__cpuc_coherent_kern_range);
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EXPORT_SYMBOL(__cpuc_flush_dcache_area);
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+EXPORT_SYMBOL(dmac_inv_range);
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+EXPORT_SYMBOL(dmac_clean_range);
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+EXPORT_SYMBOL(dmac_flush_range);
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#else
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EXPORT_SYMBOL(cpu_cache);
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#endif
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