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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
128 lines
3.9 KiB
Diff
128 lines
3.9 KiB
Diff
From 73f9cc8568b6b821107d5194fa868e922b159091 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Mon, 27 Jun 2022 01:33:05 -0500
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Subject: [PATCH 035/117] riscv: defconfig: Enable the Allwinner D1 platform
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and drivers
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Now that several D1-based boards are supported, enable the platform in
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our defconfig. Build in the drivers which are necessary to boot, such as
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the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash),
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and watchdog (which may be left enabled by the bootloader). Other common
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onboard peripherals are enabled as modules.
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Cover-letter:
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riscv: Allwinner D1 platform support
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This series adds the Kconfig/defconfig plumbing and devicetrees for a
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range of Allwinner D1-based boards. Many features are already enabled,
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including USB, Ethernet, and WiFi.
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The SoC devicetree uses bindings from the following series which have
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not yet been merged:
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- SRAM controller:
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https://lore.kernel.org/lkml/20220815041248.53268-1-samuel@sholland.org/
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- NVMEM cell bits property change:
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https://lore.kernel.org/lkml/20220814173656.11856-1-samuel@sholland.org/
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- In-package LDO regulators:
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https://lore.kernel.org/lkml/20220815043436.20170-1-samuel@sholland.org/
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All three of these are required to set the correct I/O domain voltages
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in the pin controller, which I would consider important to have in the
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initial version of the devicetree.
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The SoC devicetree does contain one small hack to avoid a dependency on
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the audio codec binding, since that is not ready yet: the codec node
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uses a bare "simple-mfd", "syscon" compatible.
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END
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Series-to: Chen-Yu Tsai <wens@csie.org>
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Series-to: Jernej Skrabec <jernej.skrabec@gmail.com>
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Series-to: linux-sunxi@lists.linux.dev
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Series-to: Palmer Dabbelt <palmer@dabbelt.com>
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Series-to: Paul Walmsley <paul.walmsley@sifive.com>
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Series-to: Albert Ou <aou@eecs.berkeley.edu>
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Series-to: linux-riscv@lists.infradead.org
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Series-cc: Rob Herring <robh+dt@kernel.org>
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Series-cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
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Series-cc: devicetree@vger.kernel.org
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Series-cc: linux-kernel@vger.kernel.org
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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arch/riscv/configs/defconfig | 23 ++++++++++++++++++++++-
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1 file changed, 22 insertions(+), 1 deletion(-)
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--- a/arch/riscv/configs/defconfig
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+++ b/arch/riscv/configs/defconfig
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@@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y
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CONFIG_EXPERT=y
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# CONFIG_SYSFS_SYSCALL is not set
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CONFIG_PROFILING=y
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+CONFIG_ARCH_SUNXI=y
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CONFIG_SOC_MICROCHIP_POLARFIRE=y
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CONFIG_SOC_SIFIVE=y
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CONFIG_SOC_STARFIVE=y
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@@ -118,22 +119,31 @@ CONFIG_VIRTIO_NET=y
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CONFIG_MACB=y
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CONFIG_E1000E=y
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CONFIG_R8169=y
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+CONFIG_STMMAC_ETH=m
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CONFIG_MICROSEMI_PHY=y
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CONFIG_INPUT_MOUSEDEV=y
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+CONFIG_KEYBOARD_SUN4I_LRADC=m
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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+CONFIG_SERIAL_8250_DW=y
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CONFIG_SERIAL_OF_PLATFORM=y
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CONFIG_VIRTIO_CONSOLE=y
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CONFIG_HW_RANDOM=y
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CONFIG_HW_RANDOM_VIRTIO=y
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+CONFIG_I2C_MV64XXX=m
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CONFIG_SPI=y
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CONFIG_SPI_SIFIVE=y
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+CONFIG_SPI_SUN6I=y
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# CONFIG_PTP_1588_CLOCK is not set
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-CONFIG_GPIOLIB=y
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CONFIG_GPIO_SIFIVE=y
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+CONFIG_WATCHDOG=y
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+CONFIG_SUNXI_WATCHDOG=y
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+CONFIG_REGULATOR=y
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+CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_DRM=m
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CONFIG_DRM_RADEON=m
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CONFIG_DRM_NOUVEAU=m
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+CONFIG_DRM_SUN4I=m
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CONFIG_DRM_VIRTIO_GPU=m
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CONFIG_FB=y
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CONFIG_FRAMEBUFFER_CONSOLE=y
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@@ -146,19 +156,30 @@ CONFIG_USB_OHCI_HCD=y
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CONFIG_USB_OHCI_HCD_PLATFORM=y
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CONFIG_USB_STORAGE=y
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CONFIG_USB_UAS=y
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+CONFIG_USB_MUSB_HDRC=m
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+CONFIG_USB_MUSB_SUNXI=m
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+CONFIG_NOP_USB_XCEIV=m
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CONFIG_MMC=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_PLTFM=y
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CONFIG_MMC_SDHCI_CADENCE=y
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CONFIG_MMC_SPI=y
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+CONFIG_MMC_SUNXI=y
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CONFIG_RTC_CLASS=y
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+CONFIG_RTC_DRV_SUN6I=y
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+CONFIG_DMADEVICES=y
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+CONFIG_DMA_SUN6I=m
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CONFIG_VIRTIO_PCI=y
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CONFIG_VIRTIO_BALLOON=y
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CONFIG_VIRTIO_INPUT=y
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CONFIG_VIRTIO_MMIO=y
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+CONFIG_SUN8I_DE2_CCU=m
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+CONFIG_SUN50I_IOMMU=y
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CONFIG_RPMSG_CHAR=y
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CONFIG_RPMSG_CTRL=y
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CONFIG_RPMSG_VIRTIO=y
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+CONFIG_PHY_SUN4I_USB=m
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+CONFIG_NVMEM_SUNXI_SID=y
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CONFIG_EXT4_FS=y
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CONFIG_EXT4_FS_POSIX_ACL=y
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CONFIG_EXT4_FS_SECURITY=y
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