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https://github.com/openwrt/openwrt.git
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afe2722f6d
All patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3, filogic/xiaomi_redmi-router-ax6000-ubootmod
Signed-off-by: John Audia <therealgraysky@proton.me>
(cherry picked from commit c815ecdebd)
94 lines
3.8 KiB
Diff
94 lines
3.8 KiB
Diff
From 3cc8011171186d906c547bc6f0c1f8e350edc7cf Mon Sep 17 00:00:00 2001
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From: Markus Stockhausen <markus.stockhausen@gmx.de>
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Date: Mon, 3 Oct 2022 14:45:21 +0200
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Subject: [PATCH] realtek: resurrect timer driver
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Now that we provide a clock driver for the Reltek SOCs the CPU frequency might
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change on demand. This has direct visible effects during operation
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- the CEVT 4K timer is no longer a stable clocksource
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- after CPU frequencies changes time calculation works wrong
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- sched_clock falls back to kernel default interval (100 Hz)
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- timestamps in dmesg have only 2 digits left
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[ 0.000000] sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps ...
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[ 0.060000] pid_max: default: 32768 minimum: 301
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[ 0.070000] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
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[ 0.070000] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
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[ 0.080000] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
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[ 0.090000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, ...
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Looking around where we can start the CEVT timer for RTL930X is a good basis.
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Initially it was developed as a clocksource driver for the broken timer in that
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specific SOC series. Afterwards it was shifted around to the CEVT location,
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got SMP enablement and lost its clocksource feature. So we at least have
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something to copy from. As the timers on these devices are well understood
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the implementation follows this way:
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- leave the RTL930X implementation as is
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- provide a new driver for RTL83XX devices only
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- swap RTL930X driver at a later time
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Like the clock driver this patch contains a self contained module that is SOC
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independet and already provides full support for the RTL838X, RTL839X and
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RTL930X devices. Some of the new (or reestablished) features are:
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- simplified initialization routines
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- SMP setup with CPU hotplug framework
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- derived from LXB clock speed
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- supplied clocksource
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- dedicated register functions for better readability
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- documentation about some caveats
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Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
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[remove unused header includes, remove old CONFIG_MIPS dependency, add
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REALTEK_ prefix to driver symbol]
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Signed-off-by: Sander Vanheule <sander@svanheule.net>
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---
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drivers/clocksource/Kconfig | 12 +++
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drivers/clocksource/Makefile | 1 +
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include/linux/cpuhotplug.h | 1 +
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3 files changed, 14 insertions(+)
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--- a/drivers/clocksource/Kconfig
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+++ b/drivers/clocksource/Kconfig
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@@ -127,6 +127,17 @@ config RDA_TIMER
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help
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Enables the support for the RDA Micro timer driver.
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+config REALTEK_OTTO_TIMER
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+ bool "Clocksource/timer for the Realtek Otto platform"
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+ select COMMON_CLK
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+ select TIMER_OF
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+ help
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+ This driver adds support for the timers found in the Realtek RTL83xx
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+ and RTL93xx SoCs series. This includes chips such as RTL8380, RTL8381
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+ and RTL832, as well as chips from the RTL839x series, such as RTL8390
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+ RT8391, RTL8392, RTL8393 and RTL8396 and chips of the RTL930x series
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+ such as RTL9301, RTL9302 or RTL9303.
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+
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config SUN4I_TIMER
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bool "Sun4i timer driver" if COMPILE_TEST
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depends on HAS_IOMEM
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--- a/drivers/clocksource/Makefile
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+++ b/drivers/clocksource/Makefile
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@@ -58,6 +58,7 @@ obj-$(CONFIG_MILBEAUT_TIMER) += timer-mi
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obj-$(CONFIG_SPRD_TIMER) += timer-sprd.o
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obj-$(CONFIG_NPCM7XX_TIMER) += timer-npcm7xx.o
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obj-$(CONFIG_RDA_TIMER) += timer-rda.o
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+obj-$(CONFIG_REALTEK_OTTO_TIMER) += timer-rtl-otto.o
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obj-$(CONFIG_ARC_TIMERS) += arc_timer.o
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obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o
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--- a/include/linux/cpuhotplug.h
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+++ b/include/linux/cpuhotplug.h
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@@ -176,6 +176,7 @@ enum cpuhp_state {
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CPUHP_AP_MARCO_TIMER_STARTING,
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CPUHP_AP_MIPS_GIC_TIMER_STARTING,
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CPUHP_AP_ARC_TIMER_STARTING,
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+ CPUHP_AP_REALTEK_TIMER_STARTING,
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CPUHP_AP_RISCV_TIMER_STARTING,
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CPUHP_AP_CLINT_TIMER_STARTING,
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CPUHP_AP_CSKY_TIMER_STARTING,
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