mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 17:48:58 +00:00
9e41117953
Fixes:
drivers/net/phy/phy-core.c: In function 'phy_interface_num_ports':
drivers/net/phy/phy-core.c:107:9: error: enumeration value 'PHY_INTERFACE_MODE_PSGMII' not handled in switch [-Werror=switch]
107 | switch (interface) {
| ^~~~~~
Fixes: 8a7f667fb5 ("kernel: 5.15: backport v6.1 PHY changes required for Aquantia")
Fixes: https://github.com/openwrt/openwrt/issues/14560
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
81 lines
2.7 KiB
Diff
81 lines
2.7 KiB
Diff
From 157ac9f52fd9b9a22cf12f7755a905fb34ef72f7 Mon Sep 17 00:00:00 2001
|
|
From: Gabor Juhos <j4g8y7@gmail.com>
|
|
Date: Fri, 25 Dec 2020 08:02:47 +0100
|
|
Subject: [PATCH] net: phy: define PSGMII PHY interface mode
|
|
|
|
The PSGMII interface is similar to QSGMII. The main difference
|
|
is that the PSGMII interface combines five SGMII lines into a
|
|
single link while in QSGMII only four lines are combined.
|
|
|
|
Similarly to the QSGMII, this interface mode might also needs
|
|
special handling within the MAC driver.
|
|
|
|
Add definitions for the PHY layer to allow to express this type
|
|
of connection between the MAC and PHY.
|
|
|
|
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
|
|
---
|
|
Documentation/devicetree/bindings/net/ethernet-controller.yaml | 1 +
|
|
drivers/net/phy/phylink.c | 2 ++
|
|
include/linux/phy.h | 3 +++
|
|
3 files changed, 6 insertions(+)
|
|
|
|
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
|
|
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
|
|
@@ -64,6 +64,7 @@ properties:
|
|
- mii
|
|
- gmii
|
|
- sgmii
|
|
+ - psgmii
|
|
- qsgmii
|
|
- tbi
|
|
- rev-mii
|
|
--- a/drivers/net/phy/phy-core.c
|
|
+++ b/drivers/net/phy/phy-core.c
|
|
@@ -140,6 +140,8 @@ int phy_interface_num_ports(phy_interfac
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
case PHY_INTERFACE_MODE_QUSGMII:
|
|
return 4;
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
+ return 5;
|
|
case PHY_INTERFACE_MODE_MAX:
|
|
WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
|
|
return 0;
|
|
--- a/drivers/net/phy/phylink.c
|
|
+++ b/drivers/net/phy/phylink.c
|
|
@@ -371,6 +371,7 @@ void phylink_get_linkmodes(unsigned long
|
|
case PHY_INTERFACE_MODE_RGMII_RXID:
|
|
case PHY_INTERFACE_MODE_RGMII_ID:
|
|
case PHY_INTERFACE_MODE_RGMII:
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
case PHY_INTERFACE_MODE_QUSGMII:
|
|
case PHY_INTERFACE_MODE_SGMII:
|
|
@@ -636,6 +637,7 @@ static int phylink_parse_mode(struct phy
|
|
|
|
switch (pl->link_config.interface) {
|
|
case PHY_INTERFACE_MODE_SGMII:
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
case PHY_INTERFACE_MODE_QUSGMII:
|
|
phylink_set(pl->supported, 10baseT_Half);
|
|
--- a/include/linux/phy.h
|
|
+++ b/include/linux/phy.h
|
|
@@ -141,6 +141,7 @@ typedef enum {
|
|
PHY_INTERFACE_MODE_XGMII,
|
|
PHY_INTERFACE_MODE_XLGMII,
|
|
PHY_INTERFACE_MODE_MOCA,
|
|
+ PHY_INTERFACE_MODE_PSGMII,
|
|
PHY_INTERFACE_MODE_QSGMII,
|
|
PHY_INTERFACE_MODE_TRGMII,
|
|
PHY_INTERFACE_MODE_100BASEX,
|
|
@@ -248,6 +249,8 @@ static inline const char *phy_modes(phy_
|
|
return "xlgmii";
|
|
case PHY_INTERFACE_MODE_MOCA:
|
|
return "moca";
|
|
+ case PHY_INTERFACE_MODE_PSGMII:
|
|
+ return "psgmii";
|
|
case PHY_INTERFACE_MODE_QSGMII:
|
|
return "qsgmii";
|
|
case PHY_INTERFACE_MODE_TRGMII:
|