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With gcc-4.8 I get a compile error with kernel 3.3. This patch fixes this problem by backporting a patch from a more recent kernel version. CC arch/mips/mm/page.o arch/mips/mm/page.c:89:6: error: 'clear_page' alias in between function and variable is not supported void clear_page(void *page) __attribute__((alias("clear_page_array"))); ^ arch/mips/mm/page.c:84:12: error: 'clear_page_array' aliased declaration [-Werror] static u32 clear_page_array[0x120 / 4]; ^ arch/mips/mm/page.c:108:6: error: 'copy_page' alias in between function and variable is not supported void copy_page(void *to, void *from) __attribute__((alias("copy_page_array"))); ^ arch/mips/mm/page.c:102:12: error: 'copy_page_array' aliased declaration [-Werror] static u32 copy_page_array[0x540 / 4]; ^ arch/mips/mm/page.c:108:6: error: 'copy_page' alias in between function and variable is not supported void copy_page(void *to, void *from) __attribute__((alias("copy_page_array"))); ^ arch/mips/mm/page.c:102:12: error: 'copy_page_array' aliased declaration [-Werror] static u32 copy_page_array[0x540 / 4]; ^ arch/mips/mm/page.c:89:6: error: 'clear_page' alias in between function and variable is not supported void clear_page(void *page) __attribute__((alias("clear_page_array"))); ^ arch/mips/mm/page.c:84:12: error: 'clear_page_array' aliased declaration [-Werror] static u32 clear_page_array[0x120 / 4]; ^ cc1: all warnings being treated as errors make[7]: *** [arch/mips/mm/page.o] Error 1 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> SVN-Revision: 40619
79 lines
2.2 KiB
Diff
79 lines
2.2 KiB
Diff
From 418df63adac56841ef6b0f1fcf435bc64d4ed177 Mon Sep 17 00:00:00 2001
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From: Nicolas Pitre <nicolas.pitre@linaro.org>
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Date: Tue, 12 Mar 2013 13:00:42 +0100
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Subject: [PATCH] ARM: 7670/1: fix the memset fix
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Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
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recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
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with the memset return value. However the memset itself became broken
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by that patch for misaligned pointers.
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This fixes the above by branching over the entry code from the
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misaligned fixup code to avoid reloading the original pointer.
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Also, because the function entry alignment is wrong in the Thumb mode
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compilation, that fixup code is moved to the end.
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While at it, the entry instructions are slightly reworked to help dual
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issue pipelines.
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Signed-off-by: Nicolas Pitre <nico@linaro.org>
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Tested-by: Alexander Holler <holler@ahsoftware.de>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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---
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arch/arm/lib/memset.S | 33 +++++++++++++--------------------
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1 file changed, 13 insertions(+), 20 deletions(-)
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--- a/arch/arm/lib/memset.S
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+++ b/arch/arm/lib/memset.S
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@@ -14,31 +14,15 @@
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.text
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.align 5
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- .word 0
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-
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-1: subs r2, r2, #4 @ 1 do we have enough
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- blt 5f @ 1 bytes to align with?
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- cmp r3, #2 @ 1
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- strltb r1, [ip], #1 @ 1
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- strleb r1, [ip], #1 @ 1
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- strb r1, [ip], #1 @ 1
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- add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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-/*
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- * The pointer is now aligned and the length is adjusted. Try doing the
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- * memset again.
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- */
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ENTRY(memset)
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-/*
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- * Preserve the contents of r0 for the return value.
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- */
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- mov ip, r0
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- ands r3, ip, #3 @ 1 unaligned?
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- bne 1b @ 1
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+ ands r3, r0, #3 @ 1 unaligned?
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+ mov ip, r0 @ preserve r0 as return value
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+ bne 6f @ 1
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/*
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* we know that the pointer in ip is aligned to a word boundary.
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*/
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- orr r1, r1, r1, lsl #8
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+1: orr r1, r1, r1, lsl #8
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orr r1, r1, r1, lsl #16
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mov r3, r1
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cmp r2, #16
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@@ -127,4 +111,13 @@ ENTRY(memset)
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tst r2, #1
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strneb r1, [ip], #1
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mov pc, lr
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+
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+6: subs r2, r2, #4 @ 1 do we have enough
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+ blt 5b @ 1 bytes to align with?
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+ cmp r3, #2 @ 1
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+ strltb r1, [ip], #1 @ 1
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+ strleb r1, [ip], #1 @ 1
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+ strb r1, [ip], #1 @ 1
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+ add r2, r2, r3 @ 1 (r2 = r2 - (4 - r3))
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+ b 1b
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ENDPROC(memset)
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