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b40e6bc55f
In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.
The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi
While this is a cosmetic change, backporting it to 19.07 will be a
major help for anyone doing backports of device support. Without it,
every backporter would have to remember to manually add the chosen node
to the device's DTS.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
(cherry picked from commit 635f111148)
175 lines
2.8 KiB
Plaintext
175 lines
2.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca956x.dtsi"
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/ {
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model = "D-Link DIR-859 A1";
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compatible = "dlink,dir-859-a1", "qca,qca9563";
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aliases {
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led-boot = &power;
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led-failsafe = &power;
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led-running = &power;
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led-upgrade = &power;
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};
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leds {
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compatible = "gpio-leds";
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wps {
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label = "dir-859-a1:green:wps";
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gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
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};
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power: power {
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label = "dir-859-a1:green:power";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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internet {
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label = "dir-859-a1:green:internet";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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wlan {
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label = "dir-859-a1:green:wlan";
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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wps {
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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gpio_switch_reset {
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gpio-export,name = "dir-859-a1:reset:switch";
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gpio-export,output = <1>;
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gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&uart {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&spi {
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num-cs = <1>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bootloader";
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reg = <0x000000 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "bdcfg";
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reg = <0x040000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "devdata";
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reg = <0x050000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "devconf";
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reg = <0x060000 0x10000>;
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read-only;
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};
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partition@70000 {
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compatible = "seama";
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label = "firmware";
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reg = <0x070000 0xf80000>;
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};
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art: partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "sgmii";
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qca,mib-poll-interval = <500>;
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qca,ar8327-initvals = <
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0x04 0x00080080 /* PORT0 PAD MODE CTRL */
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0x10 0x81000080 /* POWER_ON_STRIP */
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0x50 0xcc35cc35 /* LED_CTRL0 */
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0x54 0xcb37cb37 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x00f3cf00 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x03000101 0x00000101 0x00001919>;
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phy-mode = "sgmii";
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phy-handle = <&phy0>;
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};
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&wmac {
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status = "okay";
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qca,no-eeprom;
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};
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