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9ac80a47ea
Tested on Luxul XWR-3150 (boot, NAND, PCIe, switch, Ethernet). Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
61 lines
1.8 KiB
Diff
61 lines
1.8 KiB
Diff
From 31fd9b79dc580301c53a001482755ba7e88c2809 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Fri, 29 Oct 2021 18:05:23 +0200
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Subject: [PATCH] ARM: dts: BCM5301X: update CRU block description
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This describes CRU in a way matching documentation and fixes:
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arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dt.yaml: cru@100: $nodename:0: 'cru@100' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
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From schema: /lib/python3.6/site-packages/dtschema/schemas/simple-bus.yaml
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 13 +++++++++----
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1 file changed, 9 insertions(+), 4 deletions(-)
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -423,14 +423,14 @@
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#address-cells = <1>;
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#size-cells = <1>;
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- cru@100 {
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- compatible = "simple-bus";
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+ cru-bus@100 {
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+ compatible = "brcm,ns-cru", "simple-mfd";
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reg = <0x100 0x1a4>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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- lcpll0: lcpll0@100 {
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+ lcpll0: clock-controller@100 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-lcpll0";
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reg = <0x100 0x14>;
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@@ -439,7 +439,7 @@
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"sdio", "ddr_phy";
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};
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- genpll: genpll@140 {
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+ genpll: clock-controller@140 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-genpll";
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reg = <0x140 0x24>;
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@@ -450,6 +450,11 @@
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"sata1", "sata2";
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};
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+ syscon@180 {
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+ compatible = "brcm,cru-clkset", "syscon";
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+ reg = <0x180 0x4>;
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+ };
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+
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pinctrl: pin-controller@1c0 {
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compatible = "brcm,bcm4708-pinmux";
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reg = <0x1c0 0x24>;
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