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Siflower SF19A2890 is an SoC with: Dual-core MIPS InterAptiv at 800MHz DDR3 controller One Gigabit Ethernet MAC with RGMII and IPv4 HNAT engine Built-in 2x2 11N + 2x2 11AC WiFi radio USB 2.0 OTG I2C/SPI/GPIO and various other peripherals This PR adds support for SF19A2890 EVB with ethernet support. EVB spec: Memory: DDR3 128M Ethernet: RTL8367RB 5-port gigabit switch Flash: 16M NOR Others: MicroUSB OTG, LED x 1, Reset button x1 The built image can be flashed using u-boot recovery. This target is marked as source-only until support for a commercial router board comes. Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
39 lines
1.5 KiB
Diff
39 lines
1.5 KiB
Diff
From 819d2a48d45f3734c876186e651917bae69be9ba Mon Sep 17 00:00:00 2001
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From: Chuanhong Guo <gch981213@gmail.com>
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Date: Tue, 20 Aug 2024 08:33:43 +0800
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Subject: [PATCH 3/9] reset: add support for sf19a2890
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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---
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drivers/reset/Kconfig | 8 ++++++++
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drivers/reset/Makefile | 1 +
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2 files changed, 9 insertions(+)
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--- a/drivers/reset/Kconfig
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+++ b/drivers/reset/Kconfig
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@@ -211,6 +211,14 @@ config RESET_SCMI
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This driver uses SCMI Message Protocol to interact with the
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firmware controlling all the reset signals.
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+config RESET_SF19A2890_PERIPH
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+ bool "Siflower SF19A2890 Peripheral Reset Controller Driver"
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+ default MACH_SIFLOWER_MIPS
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+ depends on HAS_IOMEM
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+ help
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+ This enables reset controller driver for peripheral reset blocks
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+ found on Siflower SF19A2890 SoC.
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+
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config RESET_SIMPLE
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bool "Simple Reset Controller Driver" if COMPILE_TEST || EXPERT
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default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC
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--- a/drivers/reset/Makefile
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+++ b/drivers/reset/Makefile
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@@ -29,6 +29,7 @@ obj-$(CONFIG_RESET_QCOM_PDC) += reset-qc
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obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
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obj-$(CONFIG_RESET_RZG2L_USBPHY_CTRL) += reset-rzg2l-usbphy-ctrl.o
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obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
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+obj-$(CONFIG_RESET_SF19A2890_PERIPH) += reset-sf19a2890-periph.o
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obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
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obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
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obj-$(CONFIG_RESET_SUNPLUS) += reset-sunplus.o
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